DATASHEET ISL59885 FN7442 Rev 8.00 Auto-Adjusting Sync Separator for HD and SD Video October 31, 2011 The ISL59885 video sync separator extracts sync timing Features information from both standard and non-standard video inputs NTSC, PAL, SECAM, HDTV, Non-standard Video Sync in the presence of Macrovision pulses. The ISL59885 provides Separation horizontal, vertical, and composite sync outputs as well as SD/HDTV detection. An auto input frequency detect feature Fixed 70mV Slicing of Video Input Levels from 0.5V to P-P automatically adapts to a wide range of video standards (it 2V P-P does not need a different RSET resistor for different Single 3V to 5V Supply frequencies). The vertical sync pulse is output on the rising Composite Sync Output edge of the first vertical serration following the vertical pre-equalizing string. For non-standard vertical inputs, a Vertical Output default vertical pulse is output when the vertical signal stays Horizontal Output low for longer than the vertical sync default delay time. The horizontal output gives horizontal timing with pre/post HDTV Detection equalizing pulses. Fixed 70mV sync tip slicing provides sync Macrovision Compatible edge detection when the video input level is between 0.5V P-P Available in 8 Ld SOIC Package and 2V . P-P Pb-free (RoHS Compliant) The ISL59885 is available in an 8 Ld SOIC package and is specified for operation over the full -40C to +85C Applications temperature range. High-definition Video Equipment Related Literature AN1269, One Transistor Enables Clean HDTV and NTSC Video Sync Separation AN1316, One Transistor Enables Clean HDTV and NTSC Video Sync Separation TB476, Regenerating H from Corrupted SOG or C SYNC SYNC during V SYNC CLAMP SYNC TIP REF V 1.5V DD V 8 DD C 2 5V 0.1F COMPOSITE C VIDEO IN R 1 COMP. F 2 - COMPOSITE C 1 F 620 SLICE + SYNC 0.1F 510pF 1.57V GND 4 HD 5 HD C SET DETECTOR SYNC 6 C REF 3 TIP GEN 56nF 70mV SLICE VERTICAL V SYNC 3 SYNC OUT HORIZONTAL H SYNC 7 SYNC OUT 2 H ELIMINATOR FIGURE 1. SIMPLIFIED BLOCK DIAGRAM FN7442 Rev 8.00 Page 1 of 15 October 31, 2011ISL59885 Pin Configuration Pin Descriptions ISL59885 PIN (8 LD SOIC) NUMBER PIN NAME PIN FUNCTION TOP VIEW 1Composite Composite sync pulse output sync pulses Sync Out start on a falling edge and end on a rising COMPOSITE SYNC OUT 1 8 VDD edge. COMPOSITE VIDEO IN 2 7 HORIZONTAL OUTPUT 2Composite AC-coupled composite video input sync tip Video In must be at the lowest potential (positive VERTICAL SYNC OUT 3 6 CSET picture phase). GND 4 5 HD 3Vertical Vertical sync pulse output the falling edge Sync Out of vertical sync is the start of the vertical period. 4 GND Supply ground 5HD Low when input horizontal frequency is greater than 25kHz. 6 CSET (An external capacitor to ground) bypass pin for internal bias generator. 7 Horizontal Horizontal output falling edge active Output 8 VDD Positive supply Ordering Information PART NUMBER TEMP RANGE PACKAGE (Notes 1, 2, 3) PART MARKING (C) (Pb-free) PKG. DWG. ISL59885ISZ 59885 ISZ -40 to +85 8 Ld SOIC M8.15E ISL59885ISZ-EVAL Evaluation Board NOTES: 1. Add -T* suffix for tape and reel. Please refer to TB347 for details on reel specifications. 2. These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020. 3. For Moisture Sensitivity Level (MSL), please see device information page for ISL59885. For more information on MSL, please see Tech Brief TB363. FN7442 Rev 8.00 Page 2 of 15 October 31, 2011