DATASHEET ISL6227 FN9094 Rev 7.00 Dual Mobile-Friendly PWM Controller with DDR Option May 4, 2009 The ISL6227 dual PWM controller delivers high efficiency Features precision voltage regulation from two synchronous buck DC/DC Provides Regulated Output Voltage in the Range 0.9V to converters. It was designed especially to provide power 5.5V regulation for DDR memory, chipsets, graphics and other system electronics in Notebook PCs. The ISL6227s wide Operates From an Input Battery Voltage Range of 5V to input voltage range capability allows for voltage conversion 28V or From 3.3V/5V System Rail directly from AC/DC adaptor or Li-Ion battery pack. Complete DDR1 and DDR2 Memory Power Solution with Automatic mode transition of constant-frequency synchronous VTT Tracking VDDQ/2 and a VDDQ/2 Buffered Reference Output rectification at heavy load, and hysteretic (HYS) diode-emulation at light load, assure high efficiency over a wide Flexible PWM or HYS Plus PWM Mode Selection with range of conditions. The HYS mode of operation can be HYS Diode Emulation at Light Loads for Higher System disabled separately on each PWM converter if Efficiency constant-frequency continuous-conduction operation is desired r Current Sensing DS(ON) for all load levels. Efficiency is further enhanced by using the Excellent Dynamic Response With Voltage Feed-Forward lower MOSFET r as the current sense element. DS(ON) and Current Mode Control Accommodating Wide Range Voltage-feed-forward ramp modulation, current mode LC Filter Selections control, and internal feedback compensation provide fast Undervoltage Lock-Out on VCC Pin response to input voltage and load transients. Input current ripple is minimized by channel-to-channel PWM phase shift Power-Good, Overcurrent, Overvoltage, Undervoltage of 0, 90 or 180 (determined by input voltage and status of Protection for Both Channels the DDR pin). Synchronized 300kHz PWM Operation in PWM Mode The ISL6227 can control two independent output voltages Pb-Free Available (RoHS compliant) adjustable from 0.9V to 5.5V, or by activating the DDR pin, transform into a complete DDR memory power supply Applications solution. In DDR mode, CH2 output voltage VTT tracks CH1 Notebook PCs and Desknotes output voltage VDDQ. CH2 output can both source and sink current, an essential power supply feature for DDR memory. Tablet PCs/Slates The reference voltage VREF required by DDR memory is Hand-Held Portable Instruments generated as well. Ordering Information In dual power supply applications the ISL6227 monitors the PART PART TEMP. PKG. output voltage of both CH1 and CH2. An independent PGOOD NUMBER MARKING RANGE (C) PACKAGE DWG. (power good) signal is asserted for each channel after the ISL6227CA* ISL 6227CA -10 to +100 28 Ld QSOP M28.15 soft-start sequence has completed, and the output voltage is within PGOOD window. In DDR mode CH1 generates the only ISL6227CAZ* ISL 6227CAZ -10 to +100 28 Ld QSOP M28.15 (Note) (Pb-Free) PGOOD signal. ISL6227IA* ISL 6227IA -40 to +100 28 Ld QSOP M28.15 Built-in overvoltage protection prevents the output from going above 115% of the set point by holding the lower MOSFET on ISL6227IAZ* ISL 6227IAZ -40 to +100 28 Ld QSOP M28.15 (Note) (Pb-Free) and the upper MOSFET off. When the output voltage re-enters regulation, PGOOD will go HIGH and normal operation ISL6227HRZ* ISL 6227HRZ -10 to +100 28 Ld QFN L28.5x5 (Note) (Pb-Free) automatically resumes. Once the soft-start sequence has completed, undervoltage protection latches the offending ISL6227IRZ* ISL 6227IRZ -40 to +100 28 Ld QFN L28.5x5 channel off if the output drops below 75% of its set point value. (Note) (Pb-Free) Adjustable overcurrent protection (OCP) monitors the voltage *Add -T suffix for tape and reel. Please refer to TB347 for details on drop across the r of the lower MOSFET. If more precise reel specifications. DS(ON) current-sensing is required, an external current sense resistor NOTE: These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach may be used. materials, and 100% matte tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020. FN9094 Rev 7.00 Page 1 of 27 May 4, 2009ISL6227 Pinouts ISL6227 ISL6227 28 LD QSOP 28 LD 5X5 QFN TOP VIEW TOP VIEW 1 28 GND VCC 2 27 LGATE1 LGATE2 PGND1 3 26 PGND2 28 27 26 25 24 23 22 PHASE1 4 25 PHASE2 PHASE1 1 21 UGATE2 UGATE1 5 24 UGATE2 2 20 UGATE1 BOOT2 BOOT1 6 23 BOOT2 BOOT1 3 19 ISEN2 ISEN1 7 22 ISEN2 GND EN1 8 21 EN2 ISEN1 4 18 EN2 29 VOUT1 9 20 VOUT2 5 17 EN1 VOUT2 VSEN1 10 19 VSEN2 6 16 VSEN2 VOUT1 OCSET1 11 18 OCSET2 VSEN1 7 15 OCSET2 12 17 SOFT1 SOFT2 8 9 10 11 12 13 14 DDR 13 16 PG2/REF VIN 14 15 PG1 Generic Application Circuits OCSET1 Q1 L1 V OUT1 +1.80V PWM1 + C1 Q2 V IN EN1 +5V TO +28V EN2 Q3 VCC L2 V OUT2 DDR PWM2 +5V OCSET2 +1.20V + C2 Q4 ISL6227 APPLICATION CIRCUIT FOR TWO CHANNEL POWER SUPPLY OCSET1 Q1 L1 VDDQ +2.50V PWM1 + C1 Q2 V EN1 IN EN2 +5V TO 28V Q3 VCC L2 DDR VTT PWM2 +5V PG2/VREF OCSET2 +1.25V + C2 Q4 VREF +1.25V ISL6227 APPLICATION CIRCUIT FOR COMPLETE DDR MEMORY POWER SUPPLY FN9094 Rev 7.00 Page 2 of 27 May 4, 2009 OCSET1 PGN1 SOFT1 LGATE1 DDR GND VIN VCC PG1 LGATE2 PG2/REF PGND2 SOFT2 PHASE2