DATASHEET ISL6534 FN9134 Rev 2.00 Dual PWM with Linear Nov 18, 2005 The ISL6534 is a versatile triple regulator that has two Features independent synchronous-rectified buck controllers with Two Synchronous-Rectified Buck Controllers integrated 12V gate drivers (OUT1 and OUT2) and a linear - Voltage Mode Control controller (OUT3) to offer precision regulation of up to three - VIN Range up to 12V voltage rails. An optional shunt regulator allows 12V only - VOUT Range from 0.6V to 6V operation, when a 5V supply is not available. - 12V LGATE Drivers up to 12V Boot Strap for UGATE Each controller has independent soft-start and enable Switcher References functions combined on a single pin. A capacitor from each SS/EN pin to ground sets the soft-start time, and pulling - 0.6V Reference for OUT1 SS/EN below 1.0V disables the controller. The SS/EN pins - 3.3V Reference Output for OUT2 can be controlled independently or they can be ganged - External Reference Input for OUT2 together to provide complete control of start-up coordination. - Buffered VTT Reference Output The PGOOD function indicates when all regulators have Switcher Clocking completed their soft-start and provides an indication of short- - Phase Options for Optimal Clock Relationship circuit conditions on either switching regulator. - Resistor-Selectable Switching Frequency (300kHz There are two ways to control the switching frequency of the default Resistor to Ground for 300kHz to 1MHz range) PWM regulators. The default switching frequency is 300kHz - Synchronization-Capable Switching Frequency (FS SYNC to ground). A resistor from FS SYNC to ground (Connect FS SYNC to Separate Regulator) increases the switching frequency (up to 1MHz). Connecting Single Linear Controller the gate signal from another PWM IC synchronizes the - Drives N-Channel MOSFET ISL6534 switchers to the frequency of the other controller. - 0.6V Reference This allows independent regulators operating at a common frequency to avoid low-frequency beats. The gate drivers for - VIN Range up to 12V DDR mode can be staggered by 90 in order to minimize - VOUT Range from 0.6V to 3.3V cross-conduction. 12V and 5V Supplies Required (but optional shunt Switcher OUT1 has an internal reference for regulating any regulator can generate VCC = 5.8V from 12V) voltage down to 0.6V. OUT2 has current sinking capability Three Independent Soft-Start/Enable Pins and an external reference input allowing convenient - Gang Together or Control Independently connection to OUT1 through a resistor divider for DDRAM PGOOD Output Indicates All Outputs Available applications. The 3.3V reference pin provides the option for independent regulation of OUT2. The linear controller drives Thermally Enhanced QFN or TSSOP Package an external N-Channel MOSFET, making the ISL6534 one of QFN Package: the most versatile regulators available. - Compliant to JEDEC PUB95 MO-220 Simplified Block Diagram QFN - Quad Flat No Leads - Package Outline - Near Chip Scale Package footprint, which improves PCB efficiency and has a thinner profile SS1/EN1 BOOT1 OUT1 COMP1 UGATE1 Pb-Free Plus Anneal Available (RoHS Compliant) PWM CONTROLLER FB1 LGATE1 SS2/EN2 BOOT2 OUT2 REFIN UGATE2 PWM CONTROLLER FB2 LGATE2 COMP2 REFOUT VREF 3.3V PGOOD FS/SYNC SS3/EN3 OUT3 DRIVE3 FB3 LINEAR CONTROLLER FN9134 Rev 2.00 Page 1 of 29 Nov 18, 2005ISL6534 Ordering Information PART NUMBER PART MARKING TEMP. (C) PACKAGE PKG. DWG. ISL6534CV ISL6534CV 0 to 70 24 Ld EPTSSOP (exposed pad) M24.173B ISL6534CVZ (See Note) ISL6534CVZ 0 to 70 24 Ld EPTSSOP (exposed pad) (Pb-free) M24.173B ISL6534CR ISL6534CR 0 to 70 32 Ld 5x5 QFN L32.5x5 ISL6534CRZ (See Note) ISL6534CRZ 0 to 70 32 Ld 5x5 QFN (Pb-free) L32.5x5 ISL6534EVAL2 EVAL board NOTE: Intersil Pb-free plus anneal products employ special Pb-free material sets molding compounds/die attach materials and 100% matte tin plate termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020. Add -T suffix for tape and reel. Pinouts 24 LD EPTSSOP 32 LD 5x5 QFN TOP VIEW TOP VIEW FB1 1 24 VCC 2 COMP1 23 BOOT1 COMP2 3 22 UGATE1 32 31 30 29 28 27 26 25 4 21 FB2 VCC12 1 24 REFIN UGATE1 20 REFIN 5 LGATE1 2 23 PGND 1 GND NC 19 REFOUT 6 LGATE2 BOTTOM 7 18 3 22 SS1/EN1 PGND VCC12 1 REFOUT SIDE PAD 8 17 SS2/EN2 UGATE2 GND 4 21 SS1/EN1 LGATE1 SS3/EN3 9 16 BOOT2 BOTTOM 5 20 LGATE2 SS2/EN2 SIDE PAD VREF 10 15 GND 11 14 PGOOD DRIVE3 6 19 SS3/EN3 VCC12 2 12 13 FS SYNC FB3 VREF 7 18 PGND 2 DRIVE3 8 17 NC 9 10 11 12 1314 1516 NOTES: 1. BOOT2 and UGATE2 are different order in QFN. 2. NC is No Connect FN9134 Rev 2.00 Page 2 of 29 Nov 18, 2005 NC FB2FB2 FB3 COMP2 FS SYNC COMP1 PGOOD FB1 GND VCC UGATE2 NC NC NC BOOT2 BOOT1