ISL6615IRZ-T Renesas

DATASHEET ISL6615 FN6481 Rev 0.00 High-Frequency 6A Sink Synchronous MOSFET Drivers with Protection Features April 24, 2008 The ISL6615 is a high-speed MOSFET driver optimized to Features drive upper and lower power N-Channel MOSFETs in a Dual MOSFET Drives for Synchronous Rectified Bridge synchronous rectified buck converter topology. This driver, combined with an Intersil Digital or Analog multiphase PWM Advanced Adaptive Zero Shoot-Through Protection controller, forms a complete high frequency and high - Body Diode Detection efficiency voltage regulator. - LGATE Detection - Auto-zero of r Conduction Offset Effect The ISL6615 drives both upper and lower gates over a range DS(ON) of 4.5V to 13.2V. This drive-voltage provides the flexibility Adjustable Gate Voltage for Optimal Efficiency necessary to optimize applications involving trade-offs 36V Internal Bootstrap Schottky Diode between gate charge and conduction losses. Bootstrap Capacitor Overcharging Prevention The ISL6615 features 6A typical sink current for the low-side gate driver, enhancing the lower MOSFET gate hold-down Supports High Switching Frequency (up to 1MHz) capability during PHASE node rising edge, preventing power - 6A LGATE Sinking Current Capability loss caused by the self turn-on of the lower MOSFET due to - Fast Rise/Fall Times and Low Propagation Delays the high dV/dt of the switching node. Support 3.3V PWM Input logic An advanced adaptive zero shoot-through protection is Tri-State PWM Input for Safe Output Stage Shutdown integrated to prevent both the upper and lower MOSFETs from conducting simultaneously and to minimize the dead Tri-State PWM Input Hysteresis for Applications with time. The ISL6615 includes an overvoltage protection Power Sequencing Requirement feature operational before VCC exceeds its turn-on Pre-POR Overvoltage Protection threshold, at which the PHASE node is connected to the VCC Undervoltage Protection gate of the low side MOSFET (LGATE). The output voltage of the converter is then limited by the threshold of the low Expandable Bottom Copper PAD for Better Heat side MOSFET, which provides some protection to the load if Spreading the upper MOSFET(s) is shorted. Dual Flat No-Lead (DFN) Package The ISL6615 also features an input that recognizes a - Near Chip-Scale Package Footprint Improves PCB high-impedance state, working together with Intersil Efficiency and Thinner in Profile multiphase PWM controllers to prevent negative transients Pb-Free (RoHS Compliant) on the controlled output voltage when operation is suspended. This feature eliminates the need for the Schottky Applications diode that may be utilized in a power system to protect the load from negative output voltage damage. Optimized for POL DC/DC Converters for IBA Systems Core Regulators for Intel and AMD Microprocessors High Current Low-Profile DC/DC Converters High Frequency and High Efficiency VRM and VRD Synchronous Rectification for Isolated Power Supplies Related Literature Technical Brief TB363 Guidelines for Handling and Processing Moisture Sensitive Surface Mount Devices (SMDs) Technical Brief TB389 PCB Land Pattern Design and Surface Mount Guidelines for QFN Packages FN6481 Rev 0.00 Page 1 of 11 April 24, 2008ISL6615 Ordering Information PART NUMBER TEMP. PACKAGE PKG. (Note) PART MARKING RANGE (C) (Pb-free) DWG. ISL6615CBZ* 6615 CBZ 0 to +70 8 Ld SOIC M8.15 ISL6615CRZ* 6615 0 to +70 10 Ld 3x3 DFN L10.3x3 ISL6615IBZ* 6615 IBZ -40 to +70 8 Ld SOIC M8.15 ISL6615IRZ* 615I -40 to +70 10 Ld 3x3 DFN L10.3x3 *Add -T suffix for tape and reel. Please refer to TB347 for details on reel specifications. NOTE: These Intersil Pb-free plastic packaged products employ special Pb-free material sets molding compounds/die attach materials and 100% matte tin plate PLUS ANNEAL - e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020. Pinouts ISL6615 ISL6615 (8 LD SOIC) (10 LD 3x3 DFN) TOP VIEW TOP VIEW UGATE UGATE 1 8 PHASE 1 10 PHASE BOOT 2 7 PVCC 2 9 BOOT PVCC GND 3 8 PWM 3 6 VCC N/C N/C 4 7 GND 4 5 LGATE PWM VCC 5 6 LGATE GND RECOMMEND TO CONNECT PIN 3 TO GND AND PIN 8 TO PVCC Block Diagram ISL6615 (UVCC) BOOT VCC UGATE PRE-POR OVP +5V FEATURES PHASE SHOOT- (LVCC) THROUGH 13.6k PVCC PROTECTION UVCC = PVCC PWM POR/ CONTROL LOGIC LGATE 6.4k GND SUBSTRATE RESISTANCE FOR DFN DEVICES, THE PAD ON THE BOTTOM SIDE OF PAD THE PACKAGE MUST BE SOLDERED TO THE CIRCUITS GROUND. FN6481 Rev 0.00 Page 2 of 11 April 24, 2008