DATASHEET ISL6625A FN7978 Rev 0.00 Synchronous Rectified Buck MOSFET Drivers September 19, 2012 The ISL6625A is a high frequency MOSFET driver designed to Features drive upper and lower power N-Channel MOSFETs in a Dual MOSFET drives for synchronous rectified bridge synchronous rectified buck converter topology. Advanced adaptive zero shoot-through protection In ISL6625A, the upper and lower gates are both driven to an - PHASE detection externally applied voltage. This provides the capability to optimize applications involving trade-offs between gate charge -LGATE detection and conduction losses. - Auto-Zero of r conduction offset effect DS(ON) An advanced adaptive shoot-through protection is integrated to Low standby bias current prevent both the upper and lower MOSFETs from conducting 36V internal bootstrap switcher simultaneously and to minimize dead time. The ISL6625A has Bootstrap capacitor overcharging prevention a 10k integrated high-side gate-to-source resistor to prevent self turn-on due to high input bus dV/dt. Integrated high-side gate-to-source resistor to prevent from self turn-on due to high input bus dV/dt This driver also has an overvoltage protection feature, which is operational while VCC is below the POR threshold. The PHASE Pre-POR overvoltage protection for start-up and shutdown node is connected to the gate of the low-side MOSFET (LGATE) Power rails undervoltage protection via a 30k resistor, limiting the output voltage of the converter Expandable bottom copper pad for enhanced heat sinking close to the gate threshold of the low-side MOSFET. This is dependent on the current being shunted, which provides some Dual flat no-lead (DFN) package protection to the load should the upper MOSFET(s) become - Near chip-scale package footprint improves PCB shorted. efficiency and thinner in profile Pb-Free (RoHS compliant) Applications High light load efficiency voltage regulators Related Literature Core regulators for advanced microprocessors Technical Brief TB363 Guidelines for Handling and High current DC/DC converters Processing Moisture Sensitive Surface Mount Devices (SMDs) Technical Brief TB417 Designing Stable Compensation Networks for Single Phase Voltage Mode Buck Regulators VCC BOOT PIN 6 UGATE 10k POR/ +5V CONTROL 30.4k PHASE LOGIC SHOOT- PWM 30k PINS 6 AND 7 MUST BE THROUGH TIED TOGETHER PROTECTION VCC PIN 7 32k LGATE GND FIGURE 1. BLOCK DIAGRAM FN7978 Rev 0.00 Page 1 of 10 September 19, 2012ISL6625A Ordering Information PART NUMBER PART TEMP. RANGE PACKAGE PKG. (Notes 1, 2, 3) MARKING (C) (Pb-Free) DWG. ISL6625ACRZ-T 5AZ 0 to +70 8 Ld 2x2 DFN L8.2x2D ISL6625AIRZ-T 25A -40 to +85 8 Ld 2x2 DFN L8.2x2D NOTES: 1. Please refer to TB347 for details on reel specifications. 2. These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020. 3. For Moisture Sensitivity Level (MSL), please see device information page for ISL6625A. For more information on MSL please see tech brief TB363 Pin Configuration Functional Pin Descriptions ISL6625A PIN (8 LD 2x2 DFN) PIN SYMBOL FUNCTION TOP VIEW 1 UGATE Upper gate drive output. Connect to gate of high-side power N-Channel MOSFET. 1 8 PHASE UGATE 2 BOOT Floating bootstrap supply pin for the upper gate drive. 2 7 VCC BOOT Connect the bootstrap capacitor between this pin GND and the PHASE pin. The bootstrap capacitor provides PWM 3 6 VCC the charge to turn on the upper MOSFET. See GND 4 5 LGATE Internal Bootstrap Device on page 6 for guidance in choosing the capacitor value. 3 PWM The PWM signal is the control input for the driver. The PWM signal can enter three distinct states during operation, see the three-state PWM Input section for further details. Connect this pin to the PWM output of the controller. 4 GND Bias and reference ground. All signals are referenced to this node. It is also the power ground return of the driver. 5 LGATE Lower gate drive output. Connect to gate of the low-side power N-Channel MOSFET. 6,7 VCC These two pins must tie to each other. Connect them to 12V bias supply. Place a high quality low ESR ceramic capacitor from this pin to GND. 8 PHASE Connect this pin to the SOURCE of the upper MOSFET and the DRAIN of the lower MOSFET. This pin provides a return path for the upper gate drive. - PAD Connect this pad to the power ground plane (GND) via thermally enhanced connection. FN7978 Rev 0.00 Page 2 of 10 September 19, 2012