ISL76321ARZ-T7A Renesas

DATASHEET ISL76321 FN7803 Rev 2.00 16-Bit Long-Reach Video Automotive Grade SERDES with Bi-directional May 1, 2015 Side-Channel The ISL76321 is a serializer/deserializer of LVCMOS parallel Features video data. The video data presented to the serializer on the 16-bit RGB transport over a single differential pair parallel LVCMOS bus is serialized into a high-speed differential signal. This differential signal is converted back to parallel 6MHz to 50MHz pixel clock rates video at the remote end by the deserializer. It also transports AEC-Q100 qualified component auxiliary data bi-directionally over the same link during the 2 Bi-directional auxiliary data transport without extra video vertical retrace interval. I C bus mastering allows the bandwidth and over the same differential pair placement of external slave devices on the remote side of the 2 link. An I C controller can be placed on either side of the link Hot-plugging with automatic resynchronization every HSYNC 2 allowing bidirectional I C communication through the link to 2 I C bus mastering to the remote side of the link with a the external devices on the other side. Both chips can be fully controller on either the serializer or deserializer configured from a single controller or independently by local controllers. Selectable clock edge for parallel data output DC-balanced with industry standard 8b/10b line code allows Related Literature AC-coupling, providing immunity against ground shifts 16 programmable settings each for transmitter amplitude ISL34341 Data Sheet WSVGA 24-Bit Long-Reach Video boost and pre-emphasis and receiver equalization, allow for SERDES with Bi-directional Side-Channel longer cable lengths and higher data rates Slew rate control and spread spectrum capability on outputs reduce the potential for EMI Same device for serializer and deserializer simplifies inventory Applications Video entertainment systems Remote cameras 3.3V 1.8V VDD IO 3.3V 1.8V VDD IO 16 16 RGB 27nF 27nF RGB SERIOP SERIOP VIDEO VSYNC VIDEO VSYNC ISL76321 SOURCE ISL76321 27nF 27nF TARGET HSYNC HSYNC DESERIALIZER SERIALIZER SERION SERION DE DE PCLK IN PCLK OUT REF CLK PCLK IN VDD IO FIGURE 1. TYPICAL APPLICATION FN7803 Rev 2.00 Page 1 of 14 May 1, 2015 GND CR VDD TX GND AN GND P VDD AN GND TX VDD IO GND CDR VDD P GND IO 3.16k REF RES VDD CR TEST EN VDD CDR I2CA1 RSTB/PDB I2CA0 VIDEO TX GND CR GND AN VDD TX GND P VDD AN GND TX VDD IO GND CDR VDD P GND IO 3.16k REF RES VDD CR TEST EN VDD CDR I2CA1 RSTB/PDB I2CA0 VIDEO TXISL76321 Block Diagram SCL 2 I C SDA VCM GENERATOR RAM SERIOP PRE- TX EMPHASIS 3 V/H/DE SERION MUX TDM 8b/10b DEMUX RGB 16 RX EQ VIDEO TX (HI) CDR PCLK IN (REF CLK WHEN x20 VIDEO TX IS LO) PCLK OUT x20 FN7803 Rev 2.00 Page 2 of 14 May 1, 2015