DATASHEET ISL78215 FN7673 Rev 1.00 Improved Industry Standard Single-Ended Current Mode PWM Controller December 7, 2013 The ISL78215 family of adjustable frequency, low power, pulse Features width modulating (PWM) current mode controllers is designed 1A MOSFET Gate Driver for a wide range of power conversion applications including boost, flyback, and isolated output configurations. Peak 60A Start-up Current, 100A Maximum current mode control effectively handles power transients and 25ns Propagation Delay Current Sense to Output provides inherent overcurrent protection. Fast Transient Response with Peak Current Mode Control This advanced BiCMOS design is pin compatible with the Adjustable Switching Frequency to 2MHz industry standard 384x family of controllers and offers significantly improved performance. Features include low 20ns Rise and Fall Times with 1nF Output Load operating current, 60A start-up current, adjustable operating Trimmed Timing Capacitor Discharge Current for Accurate frequency to 2MHz, and high peak current drive capability with Deadtime/Maximum Duty Cycle Control 20ns rise and fall times. High Bandwidth Error Amplifier The ISL78215 is tested to AEC-Q100 specifications. Tight Tolerance Voltage Reference Over Line, Load, and Temperature Tight Tolerance Current Limit Threshold Pb-Free (RoHS Compliant) AEC-Q100 Tested Applications Automotive Power Telecom and Datacom Power Wireless Base Station Power File Server Power Industrial Power Systems PC Power Supplies Isolated Buck and Flyback Regulators Boost Regulators Pin Configuration ISL78215 (8 LD MSOP) TOP VIEW COMP 1 8 VREF FB 2 7 VDD 3 OUT CS 6 RTCT 4 5 GND FN7673 Rev 1.00 Page 1 of 11 December 7, 2013ISL78215 Pin Description PIN SYMBOL DESCRIPTION 1 COMP COMP is the output of the error amplifier and the input of the PWM comparator. The control loop frequency compensation network is connected between the COMP and FB pins. 2 FB The output voltage feedback is connected to the inverting input of the error amplifier through this pin. The non-inverting input of the error amplifier is internally tied to a reference voltage. 3 CS This is the current sense input to the PWM comparator. The range of the input signal is nominally 0V to 1.0V and has an internal offset of 100mV. 4 RTCT This is the oscillator timing control pin. The operational frequency and maximum duty cycle are set by connecting a resistor, RT, between VREF and this pin and a timing capacitor, CT, from this pin to GND. The oscillator produces a sawtooth waveform with a programmable frequency range up to 2.0MHz. The charge time, tC, the discharge time, tD, the switching frequency, f, and the maximum duty cycle, Dmax, can be calculated from Equations 1, 2, 3 and 4: (EQ. 1) t 0.583 RT CT C 0.0083 RT 4.3 ---------------------------------------------- (EQ. 2) t RT CT ln D 0.0083 RT 2.4 f =1t+ t (EQ. 3) C D Dt= f (EQ. 4) C Figure 4 may be used as a guideline in selecting the capacitor and resistor values required for a given frequency. 5 GND GND is the power and small signal reference ground for all functions. 6 OUT This is the drive output to the power switching device. It is a high current output capable of driving the gate of a power MOSFET with peak currents of 1.0A. 7 VDD VDD is the power connection for the device. The total supply current will depend on the load applied to OUT. Total IDD current is the sum of the operating current and the average output current. Knowing the operating frequency, f, and the MOSFET gate charge, Qg, the average output current can be calculated in Equation 5: I = Qg f (EQ. 5) OUT To optimize noise immunity, bypass VDD to GND with a ceramic capacitor as close to the VDD and GND pins as possible. 8 VREF The 5.00V reference voltage output. +1.0/-1.5% tolerance over line, load and operating temperature. Bypass to GND with a 0.1F to 3.3F capacitor to filter this output as needed. Ordering Information PART NUMBER TEMP RANGE PACKAGE PKG. (Notes 2, 3) PART MARKING (C) (Pb-free) DWG. ISL78215AUZ 78215 -40 to +105 8 Ld MSOP M8.118 ISL78215AUZ-T (Note 1) 78215 -40 to +105 8 Ld MSOP M8.118 1. Please refer to TB347 for details on reel specifications. 2. These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil Pb- free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020. 3. For Moisture Sensitivity Level (MSL), please see device information page for ISL78215. For more information on MSL please see techbrief TB363. FN7673 Rev 1.00 Page 2 of 11 December 7, 2013