DATASHEET High Performance 2A and 3A Linear Regulators ISL80102, ISL80103 Features The ISL80102 and ISL80103 are low voltage, high-current, single Stable with ceramic capacitors (Note 11) output LDOs specified for 2A and 3A output current, respectively. 2A and 3A output current ratings These LDOs operate from the input voltages of 2.2V to 6V and 2.2V to 6V input voltage range are capable of providing the output voltages of 0.8V to 5.5V on the adjustable V versions. Other custom voltage options 1.8% V accuracy guaranteed over line, load and OUT OUT available upon request. T = -40C to +125C J Very low 120mV dropout voltage at 3A (ISL80103) For applications that demand inrush current less than the current limit, an external capacitor on the soft-start pin provides Very fast transient response adjustment. The ENABLE feature allows the part to be placed into Excellent 62dB PSRR a low quiescent current shutdown mode. A submicron BiCMOS process is utilized for this product family to deliver the 49V output noise RMS best-in-class analog performance and overall value. Power-good output These CMOS (LDOs) will consume significantly lower quiescent Adjustable inrush current limiting current as a function of load over bipolar LDOs, which translates Short-circuit and over-temperature protection into higher efficiency and the ability to consider packages with Available in a 10 Ld DFN smaller footprints. The quiescent current has been modestly compromised to enable a leading class fast load transient Applications response, and hence a lower total AC regulation band for an LDO in this category. Servers Telecommunications and networking Medical equipment Instrumentation systems Routers and switchers ISL80102, ISL80103 2.5V 10% 1.8V 1.8% 1 9 V V OUT V IN V OUT IN 2 C 10 OUT C V IN V OUT IN 10F 10F R PG 100k ON 3 SENSE 7 ENABLE OFF 4 6 PGOOD SS PG *C SS GND 5 *CSS is optional, (see Note 12 on page 5). FIGURE 1. TYPICAL APPLICATION FOR FIXED OUTPUT VOLTAGE VERSION September 2, 2016 CAUTION: These devices are sensitive to electrostatic discharge follow proper IC Handling Procedures. 1 1-888-INTERSIL or 1-888-468-3774 Copyright Intersil Americas LLC 2009-2013, 2016. All Rights Reserved FN6660.8 Intersil (and design) is a trademark owned by Intersil Corporation or one of its subsidiaries. All other trademarks mentioned are the property of their respective owners.ISL80102, ISL80103 ISL80102, ISL80103 1.8V 2.5V 10% 1 9 V V V OUT OUT IN V IN C 2 OUT C 10 IN V V OUT IN 10F 10F R PG 100k R 1 10k 4 PGOOD PG 7 ENABLE EN OPEN DRAIN COMPATIBLE **C PB R 3 6 SS 2.61k 47pF 3 ADJ *C SS GND R 5 4 1.0k *CSS is optional, (see Note 12 on page 5). **C is optional. See Functional Description on page 12 for more information. PB FIGURE 2. TYPICAL APPLICATION DIAGRAM FOR ADJUSTABLE OUTPUT VOLTAGE VERSION Pin Descriptions TABLE 1. COMPONENTS VALUE SELECTION PIN PIN V R R C C OUT TOP BOTTOM PB OUT NUMBER NAME DESCRIPTION (V) (k ) ( ) (pF) (F) 1, 2 V Output voltage pin 5.0 2.61 287 47 10 OUT 3SENSE/ Remote voltage sense for internally fixed V 3.3 2.61 464 47 10 OUT ADJ options. ADJ pin for externally set V . OUT 2.5 2.61 649 47 10 4PG V in regulation signal. Logic low defines when OUT 1.8 (Note 1) 2.61 1.0k 47 10 V is not in regulation. Must be grounded if not OUT used. 1.8 (Note 1) 2.61 1.0k 82 22 5GND GND pin 1.5 2.61 1.3k 82 22 6 SS External cap adjusts inrush current. Leave this pin 1.2 2.61 1.87k 150 47 open if not used. 1.0 2.61 2.61k 150 47 7ENABLE V independent chip enable. TTL and CMOS IN 0.8 2.61 4.32k 150 47 compatible. NOTE: 8 DNC Do not connect this pin to ground or supply. Leave 1. Either option could be used depending on cost/performance floating. requirements 9, 10 V Input supply pin IN EPAD EPAD must be connected to copper plane with as Pin Configuration many vias as possible for proper electrical and ISL80102, ISL80103 optimal thermal performance. (10 LD 3x3 DFN) TOP VIEW V V OUT 1 10 IN V V 2 9 OUT IN SENSE/ADJ DNC 3 EPAD 8 PG 4 7 ENABLE GND 5 6 SS Submit Document Feedback FN6660.8 2 September 2, 2016