High Speed, Dual Channel, 6A, 4.5 to 16V , Power OUT MOSFET Drivers ISL89160, ISL89161, ISL89162 Features The ISL89160, ISL89161, and ISL89162 are high-speed, 6A, Dual output, 6A peak currents, can be paralleled dual channel MOSFET drivers. These parts are identical to the Typical ON-resistance <1 ISL89163, ISL89164, ISL89165 drivers but without the enable Specified Miller plateau drive currents inputs for each channel. Very low thermal impedance ( = 3C/W) JC Two input logic thresholds are available: 3.3V (CMOS and TTL Hysteretic input logic levels for 3.3V CMOS, 5V CMOS, and TTL compatible) and 5.0V (CMOS). Precision threshold inputs for time delays with external RC Precision thresholds on all logic inputs allow the use of external components RC circuits to generate accurate and stable time delays on both inputs, INA and INB. This capability is very useful for dead time 20ns rise and fall time driving a 10nF load. control. NC pins may be connected to ground or VDD to ease PCB layout difficulties. At high switching frequencies, these MOSFET drivers use very little bias current. Separate, non-overlapping drive circuits are Applications used to drive each CMOS output FET to prevent shoot-thru currents in the output stage. Synchronous Rectifier (SR) driver The start-up sequence is design to prevent unexpected glitches Switch mode power supplies when V is being turned on or turned off. When V < ~1V, an DD DD Motor drives, class D amplifiers, UPS, inverters internal 10k resistor between the output and ground helps to Pulse transformer driver keep the output voltage low. When ~1V < V < UV, both outputs DD are driven low with very low resistance and the logic inputs are Clock/line driver ignored. This insures that the driven FETs are off. When V > UVLO, and after a short delay, the outputs now respond to DD Related Literature the logic inputs. AN1603 ISL6752/54EVAL1Z ZVS DC/DC Power Supply with Synchronous Rectifiers User Guide 3.5 3.0 POSITIVE THRESHOLD V DD 2.5 NC 1 8 NC 2.0 INA OUTA 2 7 EPAD 1.5 GND NEGATIVE THRESHOLD 3 6 INB OUTB 1.0 4 5 4.7F 0.5 0.0 -40 -25 10 5 20 35 50 65 80 95 110 125 TEMPERATURE (C) FIGURE 1. TYPICAL APPLICATION FIGURE 2. TEMPERATURE STABLE LOGIC THRESHOLDS February 20, 2013 CAUTION: These devices are sensitive to electrostatic discharge follow proper IC Handling Procedures. 1 1-888-INTERSIL or 1-888-468-3774 Copyright Intersil Americas LLC 2010-2013. All Rights Reserved FN7719.3 Intersil (and design) is a trademark owned by Intersil Corporation or one of its subsidiaries. All other trademarks mentioned are the property of their respective owners. OPTION B THRESHOLDS (5V)ISL89160, ISL89161, ISL89162 Block Diagram V DD Separate FET drives, with For options A and B, the UV For clarity, only one non-overlapping outputs, comparator holds off the prevent shoot-thru channel is shown outputs until V ~> 3.3V . DD DC currents in the output CMOS FETs resulting with very low high frequency operating currents. ISL89160 INx OUTx 10k ISL89161, EPAD ISL89162 GND For proper thermal and electrical performance, the EPAD must be connected to the PCB ground plane. Pin Configurations Pin Descriptions ISL89160FR, ISL89160FB ISL89161FR, ISL89161FB PIN NUMBER SYMBOL DESCRIPTION (8 LD TDFN, EPSOIC) (8 LD TDFN, EPSOIC) TOP VIEW TOP VIEW 1, 8 NC No Connect. This pin may be left open or connected to 0V or VDD NC NC 1 8 NC 8 NC 1 2 INA or /INA Channel A input, 0V to VDD INA OUTA 2 7 /INA OUTA 2 7 3 GND Power Ground, 0V GND 6 VDD 3 GND VDD 3 6 4 INB or /INB Channel B enable, 0V to VDD INB OUTB 4 5 /INB OUTB 4 5 5 OUTB Channel B output 6 VDD Power input, 4.5V to 16V ISL89162FR, ISL89162FB 7 OUTA Channel A output, 0V to VDD (8 LD TDFN, EPSOIC) EPAD Power Ground, 0V TOP VIEW NC NC 1 8 /INA 7 OUTA 2 GND VDD 3 6 INB OUTB 4 5 FN7719.3 2 February 20, 2013