DATASHEET ISL97645A FN6353 Rev 1.00 Boost + VON Slice + VCOM + Reset October 21, 2010 The ISL97645A represents an integrated DC/DC regulator Features for monitor and notebook applications with screen sizes up 2.7V to 5.5V Input to 20. The device integrates a boost converter for generating A , a V slice circuit, and a high performance 2.6A Integrated Boost for Up to 20V A VDD ON VDD V amplifier. COM Integrated V Slice ON The boost converter features a 2.6A FET and has user RESET signal generated by Supply Monitor programmable soft-start and compensation. With efficiencies 600kHz/1.2MHz f up to 92%, the A is user selectable from 7V to 20V. S VDD V Amplifier COM The V slice circuit can control gate voltages up to 30V. ON -30MHz BW High and low levels are programmable, as well as discharge -50V/s SR rate and timing. - 400mA Peak Output Current The supply monitor can be used to monitor the input voltage UV and OT Protection to prevent low voltage operation. 24 Ld 4x4 QFN The integrated V features high speed and drive COM capability. With 30MHz bandwidth and 50V/s slew rate, the Pb-Free (RoHS Compliant) V amplifier is capable of driving 400mA peaks, and COM 100mA continuous output current. Applications LCD Monitors (15+) Ordering Information Notebook Display (up to 16) PART TEMP. NUMBER PART RANGE PACKAGE PKG. Pinout (Notes 1, 2, 3) MARKING (C) (Pb-Free) DWG. ISL97645A ISL97645AIRZ 976 45AIRZ -40 to +85 24 Ld 4x4 QFN L24.4x4D (24 LD 4x4 QFN) NOTES: TOP VIEW 1. Add -T* suffix for tape and reel. Please refer to TB347 for details on reel specifications. 2. These Intersil Pb-free plastic packaged products employ special Pb- free material sets, molding compounds/die attach materials, and 24 23 22 21 20 19 100% matte tin plate plus anneal (e3 termination finish, which is GND 18 LX 1 RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil Pb-free products are MSL classified at VGH M VIN2 2 17 Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020. VFLK FREQ2 3 16 3. For Moisture Sensitivity Level (MSL), please see device VDPM 15 COMP 4 information page for ISL97645A. For more information on MSL please see techbrief TB363. VDD1 SS 5 14 VDD2 RESET 6 13 78 9 10 11 12 FN6353 Rev 1.00 Page 1 of 16 October 21, 2010 OUT VGH NEG RE POS CE AGND PGND CD2 FB VDIV ENABLEISL97645A Pin Descriptions PIN NUMBER NAME DESCRIPTION 1 GND Signal ground 2 VGH M Gate Pulse Modulator Output 3 VFLK Gate Pulse Modulator Control input 4 VDPM Gate Pulse Modulator Enable. Connect a capacitor from VDPM to GND to set the delay time before GPM is enabled. A 20A current source charges CDPM. Power on delay time = 60.75k*CDPM. 5 VDD1 Gate Pulse Modulator Low Voltage Input 6 VDD2 VCOM Amplifier Supply 7 OUT VCOM Amplifier Output 8 NEG VCOM Amplifier Inverting input 9 POS VCOM Amplifier Non-inverting input 10 AGND VCOM Amplifier Ground 11 CD2 Voltage detector rising edge delay. Connect a capacitor between this pin and GND to set the rising edge delay. 12 VDIV Voltage detector threshold. Connect to the center of a resistive divider between V and GND. IN 13 RESET Voltage detector reset output. 14 SS Boost Converter Soft-Start. Connect a capacitor between this pin and GND to set the soft-start time. 15 COMP Boost Converter Compensation pin. Connect a series resistor and capacitor between this pin and GND to optimize transient response. 16 FREQ Boost Converter frequency select 17 VIN2 Boost Converter power supply 18 LX Boost Converter Switching Node 19 ENABLE Chip Enable pin. Connect to VIN1 for normal operation, GND for shutdown. 20 FB Boost Converter Feedback 21 PGND Boost Converter Power Ground 22 RE Gate Pulse Modulator Slew Control. Connect a resistor between this pin and GND to set the falling slew rate. 23 CE Gate Pulse Modulator Delay Control. Connect a capacitor between this pin and GND to set the delay time. 24 VGH Gate Pulse Modulator High Voltage Input FN6353 Rev 1.00 Page 2 of 16 October 21, 2010