KDC5612EVAL Renesas

KDC5612EVAL KDC5612EVAL Schematics C14 C16 C18 C21 C27 C28 C47 C48 C49 C50 100pF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 10000pF 0.1uF 0.1uF 100pF SC0 L3 Bead SCL U1 KAD5612P SD0 L2 Bead SDA AVDD 1 AVDD 54 D10P D10P L11 Bead 2 53 D10N DNC D10N C8 C9 C11 C12 SCL 3 52 D9P DNC D9P SDA 4 51 D9N DNC D9N 100pF 100pF L12 Bead 100pF 100pF 5 50 D8P DNC D8P 49 D8N D8N AVDD 6 AVDD GND 7 48 CLKOUTP AVSS CLKOUTP 47 CLKOUTN CLKOUTN BINP 8 BINP BINN 9 46 10K R53 BINN RLVDS GND 10 45 DGND AVSS OVSS GND 11 AVSS GND 12 44 D7P AVSS D7P AINN 13 43 D7N AINN D7N L25 AINP 14 42 D6P AINP D6P BLM18AG102SN1D 41 D6N D6N Vcm Vcm out 15 40 D5P VCM D5P clkdivn 16 39 D5N CLKDIV D5N 17 38 D4P DNC D4P 18 37 D4N DNC D4N Under DUT. L15 bead L16 bead L17 bead L18 bead anlg 1.8V HI= Gray Code anlg 1.8V HI=2mA LVDS anlg 1.8V HI= clk div4 anlg 1.8V HI= Nap LO= Unsign LO= LVCMOS LO= clk div2 LO = Normal Ft=Twos Comp Ft= 3mA LVDS Ft=clk div1 Ft= Sleep R15 R32 R28 R33 DNP DNP DNP DNP OUTFMT output mode clkdivn nap sleep normal R14 R30 R29 R34 1K DNP DNP 1K INTERSIL PROPRIETARY AND CONFIDENTIAL. SUBJECT TO NONDISCLOS Title KDC5612P Size Number R page1 FIGURE 1. ADC, MODE PINS AND POWER SUPPLY BYPASS 1 AVDD pin71 AVDD pin1 AVDD pin6 AVDD pin19 AVDD pin24 Vcm out pin15 clkdivn pin16 output mode pin22 nap sleep normal pin23 OUTFMT pin70 0 GND EP AVDD 19 AVDD clk inp 20 72 GND CLKP AVSS clk inn 21 71 AVDD CLKN AVDD 70 OUTFMT OUTFMT output mode 22 OUTMODE nap sleep normal 23 69 SDIO NAPSLP SDIO AVDD 24 68 SCLK AVDD SCLK 67 CSB CSB 66 SDO SDO RESETN 25 RESETN DGND 26 65 DGND OVSS OVSS OVDD 27 OVDD 64 ORP ORP D0N 28 63 ORN NC ORN D0P 29 62 D13P NC D13P D1N 30 61 D13N NC D13N D1P 31 60 D12P NC D12P D2N 32 59 D12N D2N D12N D2P 33 58 D11P D2P D11P D3N 34 57 D11N D3N D11N D3P 35 D3P 56 OVDD OVDD OVDD 36 55 DGND OVDD OVSS 100pF C43 SDIO 100pF C44 SCLK 100pF C45 CSB 100pF C46 SDO 0.1uF C17 OVDD pin56 0.1uF C25 OVDD pin27 0.1uF C29 OVDD pin36KDC5612EVAL KDC5612EVAL Schematics (Continued) ADT1-1WT ADT1-1WT ADT1-1WT ADT1-1WT J3 C39 DNP DNP T6 T7 R18 T8 T9 R24 SMA 3 4 3 4 F VinBm BINP 3 4 3 4 F VinAm AINN coplanar wave guide. J5 C56 0.01uF SMA coplanar wave guide. R49 2 2 R58 2 2 DNP 0.01uF DNP DNP DNP R20 R26 1 6 1 6 F VinBp BINN 1 6 1 6 flux VinAp AINP R51 R55 L23 L24 0 0 DNP DNP Vcm Vcm C41 C40 C55 C54 Vcm DNP DNP Vcm DNP DNP C42 C51 0.1uF L13 L19 0.1uF 1uH 1uH R16 R22 T VinBm BINP Tx VinAm AINN L1 L9 0 0 Bead L5 Bead L7 J2 C10 270nH C30 270nH SMA 1 6 1 6 DNP R19 1 6 1 6 DNP R25 coplanar wave guide. 26.1 26.1 0.01uF DNP 0.1uF DNP C19 J4 C24 C13 C33 3 4 3 4 L6 R21 SMA coplanar wave guide. 3 4 3 4 L8 R27 270nH 26.1 270nH 26.1 0.1uF 0.01uF T1 T2 DNP T3 T4 DNP L4 ADTL1-12+ ADTL1-12+ L10 ADTL1-12+ ADTL1-12+ R17 R23 Bead Tx VinBp BINN Bead Tx VinAp AINP 0 0 L14 L21 L20 L22 1uH BLM18AG102SN1D 1uH BLM18AG102SN1D Vcm Vcm C63 C15 C20 C64 C22 C26 0.1uF 0.01uF 0.01uF 0.1uF 0.01uF 0.01uF Vcm Vcm anlg 3.3V anlg 3.3VCLOCK I C57 C59 C60 C58 NB6L14MMNG TC4-1W SMA C36 C32 0.1uF 0.1uF 1000pF 1000pF U5 T5 clk inp coplanar wave guide. J6 1000pF 1000pF C34 15 DNP R31 Q0 16 C52 200 Q0 12 1 clk inp IN Q1 C31 11 2 1000pFCLOCK I J7 VT Q1 clk inn 1000pF 10 3 VREFAC Q2 R57 SMA C62 9 4 DNP IN Q2 100 1000pF 5 C53 Q3 6 clk inn Q3 C61 INTERSIL PROPRIETARY AND CONFIDENTIAL. SUBJECT TO NONDISCLOSURE AGRE 0.01uF Title KDC5612P Size Number Revision page2 B FIGURE 2. CLOCK AND ANALOG INPUTS 2 0 8 EP EN 13 7 GND Vcc 14 Vcc R64 49.9 R65 49.9 R61 49.9 R62 49.9 R60 49.9 R59 49.9 R63 49.9 R66 49.9