Datasheet
RL78/G13 R01DS0131EJ0310
Rev.3.10
RENESAS MCU
Nov 15, 2013
True Low Power Platform (as low as 66 A/MHz, and 0.57 A for RTC + LVD), 1.6 V to 5.5 V
operation, 16 to 512 Kbyte Flash, 41 DMIPS at 32 MHz, for General Purpose Applications
1. OUTLINE
1.1 Features
Ultra-Low Power Technology Data Memory Access (DMA) Controller
1.6 V to 5.5 V operation from a single supply Up to 4 fully programmable channels
Stop (RAM retained): 0.23 A, (LVD enabled): 0.31 Transfer unit: 8- or 16-bit
A
Halt (RTC + LVD): 0.57 A
Multiple Communication Interfaces
2
Snooze: 0.70 mA (UART), 1.20 mA (ADC)
Up to 8 x I C master
2
Operating: 66 A/MHz
Up to 2 x I C multi-master
Up to 8 x CSI/SPI (7-, 8-bit)
16-bit RL78 CPU Core Up to 4 x UART (7-, 8-, 9-bit)
Delivers 41 DMIPS at maximum operating frequency Up to 1 x LIN
of 32 MHz
Instruction Execution: 86% of instructions can be
Extended-Function Timers
executed in 1 to 2 clock cycles
Multi-function 16-bit timers: Up to 16 channels
CISC Architecture (Harvard) with 3-stage pipeline
Real-time clock (RTC): 1 channel (full calendar and
Multiply Signed & Unsigned: 16 x 16 to 32-bit result in
alarm function with watch correction function)
1 clock cycle
Interval Timer: 12-bit, 1 channel
MAC: 16 x 16 to 32-bit result in 2 clock cycles
15 kHz watchdog timer : 1 channel (window function)
16-bit barrel shifter for shift & rotate in 1 clock cycle
1-wire on-chip debug function
Rich Analog
ADC: Up to 26 channels, 10-bit resolution, 2.1 s
Main Flash Memory
conversion time
Density: 16 KB to 512 KB
Supports 1.6 V
Block size: 1 KB
Internal voltage reference (1.45 V)
On-chip single voltage flash memory with protection
On-chip temperature sensor
from block erase/writing
Self-programming with secure boot swap function
Safety Features (IEC or UL 60730 compliance)
and flash shield window function
Flash memory CRC calculation
RAM parity error check
Data Flash Memory
RAM write protection
Data Flash with background operation
SFR write protection
Data flash size: 4 KB to 8 KB size options
Illegal memory access detection
Erase Cycles: 1 Million (typ.)
Clock stop/ frequency detection
Erase/programming voltage: 1.8 V to 5.5 V
ADC self-test
RAM
General Purpose I/O
2 KB to 32 KB size options
5V tolerant, high-current (up to 20 mA per pin)
Supports operands or instructions
Open-Drain, Internal Pull-up support
Back-up retention in all modes
Different potential interface support: Can connect to
a 1.8/2.5/3 V device
High-speed On-chip Oscillator
32 MHz with +/ 1% accuracy over voltage (1.8 V to
Operating Ambient Temperature
5.5 V) and temperature (20 C to 85 C)
Standard: 40 C to +85 C
Pre-configured settings: 32 MHz, 24 MHz, 16 MHz,
Extended: 40 C to +105 C
12 MHz, 8 MHz, 6 MHz, 4 MHz, 3 MHz, 2 MHz,
and 1 MHz
Package Type and Pin Count
From 3mm x 3mm to 14mm x 20mm
Reset and Supply Management
QFP: 44, 48, 52, 64, 80, 100, 128
Power-on reset (POR) monitor/generator
QFN: 24, 32, 40, 48
Low voltage detection (LVD) with 14 setting options
SSOP: 20, 30
(Interrupt and/or reset function)
LGA: 25, 36
BGA: 64
R01DS0131EJ0310 Rev.3.10 Page 1 of 194
Nov 15, 2013
RL78/G13 1. OUTLINE
ROM, RAM capacities
Flash Data RAM RL78/G13
ROM flash
20 pins 24 pins 25 pins 30 pins 32 pins 36 pins
128 8 KB 12 KB R5F100AG R5F100BG R5F100CG
KB
R5F101AG R5F101BG R5F101CG
96 8 KB 8 KB R5F100AF R5F100BF R5F100CF
KB
R5F101AF R5F101BF R5F101CF
64 4 KB 4 KB R5F1006E R5F1007E R5F1008E R5F100AE R5F100BE R5F100CE
Note 1
KB R5F1016E R5F1017E R5F1018E R5F101AE R5F101BE R5F101CE
48 4 KB 3 KB R5F1006D R5F1007D R5F1008D R5F100AD R5F100BD R5F100CD
KB
R5F1016D R5F1017D R5F1018D R5F101AD R5F101BD R5F101CD
32 4 KB 2 KB R5F1006C R5F1007C R5F1008C R5F100AC R5F100BC R5F100CC
KB R5F1016C R5F1017C R5F1018C R5F101AC R5F101BC R5F101CC
16 4 KB 2 KB R5F1006A R5F1007A R5F1008A R5F100AA R5F100BA R5F100CA
KB
R5F1016A R5F1017A R5F1018A R5F101AA R5F101BA R5F101CA
Flash Data RAM RL78/G13
ROM flash
40 pins 44 pins 48 pins 52 pins 64 pins 80 pins 100 pins 128 pins
512 8 KB 32 KB R5F100FLR5F100GL R5F100JL R5F100LL R5F100ML R5F100PL R5F100SL
Note 3
KB
R5F101FLR5F101GL R5F101JL R5F101LL R5F101ML R5F101PL R5F101SL
384 8 KB 24 KB R5F100FKR5F100GKR5F100JK R5F100LK R5F100MK R5F100PK R5F100SK
KB
R5F101FKR5F101GKR5F101JK R5F101LK R5F101MK R5F101PK R5F101SK
256 8 KB 20 KB R5F100FJR5F100GJ R5F100JJ R5F100LJ R5F100MJ R5F100PJ R5F100SJ
Note 2
KB
R5F101FJR5F101GJ R5F101JJ R5F101LJ R5F101MJ R5F101PJ R5F101SJ
192 8 KB 16 KB R5F100EH R5F100FH R5F100GH R5F100JH R5F100LH R5F100MH R5F100PH R5F100SH
KB
R5F101EH R5F101FHR5F101GH R5F101JH R5F101LH R5F101MH R5F101PH R5F101SH
128 8 KB 12 KB R5F100EG R5F100FG R5F100GG R5F100JG R5F100LG R5F100MG R5F100PG
KB R5F101EG R5F101FGR5F101GG R5F101JG R5F101LG R5F101MG R5F101PG
96 8 KB 8 KB R5F100EF R5F100FF R5F100GF R5F100JF R5F100LF R5F100MF R5F100PF
KB
R5F101EF R5F101FFR5F101GFR5F101JF R5F101LF R5F101MF R5F101PF
64 4 KB 4 KB R5F100EE R5F100FE R5F100GE R5F100JE R5F100LE
Note 1
KB
R5F101EE R5F101FER5F101GE R5F101JE R5F101LE
48 4 KB 3 KB R5F100ED R5F100FD R5F100GD R5F100JD R5F100LD
KB
R5F101ED R5F101FDR5F101GD R5F101JD R5F101LD
32 4 KB 2 KB R5F100EC R5F100FC R5F100GC R5F100JC R5F100LC
KB
R5F101EC R5F101FCR5F101GC R5F101JC R5F101LC
16 4 KB 2 KB R5F100EA R5F100FA R5F100GA
KB
R5F101EA R5F101FAR5F101GA
Notes 1. This is about 3 KB when the self-programming function and data flash function are used. (For details, see CHAPTER
3 in the RL78/G13 Users Manual Hardware)
2. This is about 19 KB when the self-programming function and data flash function are used. (For details, see
CHAPTER 3 in the RL78/G13 Users Manual Hardware)
3. This is about 31 KB when the self-programming function and data flash function are used. (For details, see
CHAPTER 3 in the RL78/G13 Users Manual Hardware)
R01DS0131EJ0310 Rev.3.10 Page 2 of 194
Nov 15, 2013