Datasheet R01DS0193EJ0230 RL78/G12 Rev.2.30 Jun 19, 2020 RENESAS MCU True low-power platform (63 A/MHz) for the general-purpose applications, with 1.8-V to 5.5-V operation, 2- to 16-Kbyte code flash memory, and 31 DMIPS at 24 MHz 1. OUTLINE 1.1 Features Note Ultra-low power consumption technology DMA (Direct Memory Access) controller VDD = single power supply voltage of 1.8 to 5.5 V which 2 channels can operate at a low voltage Number of clocks during transfer between 8/16-bit SFR HALT mode and internal RAM: 2 clocks STOP mode SNOOZE mode Multiplier and divider/multiply-accumulator 16 bits x 16 bits = 32 bits (Unsigned or signed) 32 bits x 32 bits = 32 bits (Unsigned) RL78 CPU core 16 bits x 16 bits + 32 bits = 32 bits (Unsigned or CISC architecture with 3-stage pipeline signed) Minimum instruction execution time: Can be changed from high speed (0.04167 s: 24 MHz operation with high-speed on-chip oscillator) to ultra-low speed (1 s: Serial interface 1 MHz operation) CSI : 1 to 3 channels Address space: 1 MB UART : 1 to 3 channels 2 General-purpose registers: (8-bit register x 8) x 4 banks Simplified I C communication : 0 to 3 channels 2 On-chip RAM: 256 B to 2 KB I C communication : 1 channel Code flash memory Timer Code flash memory: 2 to 16 KB 16-bit timer : 4 to 8 channels Block size: 1 KB 12-bit interval timer : 1 channel Prohibition of block erase and rewriting (security Watchdog timer : 1 channel (operable with the function) dedicated low-speed on-chip On-chip debug function oscillator) Self-programming (with flash shield window function) A/D converter Note Data flash memory 8/10-bit resolution A/D converter (VDD = 1.8 to 5.5 V) Data flash memory: 2 KB 8 to 11 channels, internal reference voltage (1.45 V), Back ground operation (BGO): Instructions are Note and temperature sensor executed from the program memory while rewriting the data flash memory. I/O port Number of rewrites: 1,000,000 times (TYP.) I/O port: 18 to 26 Voltage of rewrites: VDD = 1.8 to 5.5 V (N-ch open drain I/O withstand voltage of 6 V : 2, N-ch open drain I/O VDD withstand voltage : 4 to 9) High-speed on-chip oscillator Can be set to N-ch open drain, TTL input buffer, and Select from 24 MHz, 16 MHz, 12 MHz, 8 MHz, 6 MHz, on-chip pull-up resistor 4 MHz, 3 MHz, 2 MHz, and 1 MHz Different potential interface: Can connect to a 1.8/2.5/3 High accuracy: +/- 1.0 % (VDD = 1.8 to 5.5 V, TA = -20 V device to +85 C) On-chip key interrupt function On-chip clock output/buzzer output controller Operating ambient temperature TA = -40 to +85 C (A: Consumer applications, D: Others Industrial applications) On-chip BCD (binary-coded decimal) correction circuit Note TA = -40 to +105 C (G: Industrial applications) Note Can be selected only in HS (high-speed main) Power management and reset function mode. On-chip power-on-reset (POR) circuit On-chip voltage detector (LVD) (Select interrupt and reset from 12 levels) Remark The functions mounted depend on the product. See 1.7 Outline of Functions. R01DS0193EJ0230 Rev.2.30 Page 1 of 108 Jun 19, 2020 RL78/G12 1. OUTLINE ROM, RAM capacities Code flash Data flash RAM 20 pins 24 pins 30 pins 16 KB 2 KB 2 KB R5F102AA R5F103AA Note 1 Note 1 2 KB 1.5 KB R5F1026A R5F1027A Note 1 Note 1 R5F1036A R5F1037A Note 1 Note 1 12 KB 2KB 1 KB R5F10269 R5F10279 R5F102A9 Note 1 Note 1 R5F10369 R5F10379 R5F103A9 Note 1 Note 1 8 KB 2 KB 768 B R5F10268 R5F10278 R5F102A8 Note 1 Note 1 R5F10368 R5F10378 R5F103A8 4 KB 2KB 512 B R5F10267 R5F10277 R5F102A7 R5F10367 R5F10377 R5F103A7 Note 2 2 KB 2 KB 256 B R5F10266 Note 2 R5F10366 Notes 1. This is 640 bytes when the self-programming function or data flash function is used. (For details, see CHAPTER 3 CPU ARCHITECTURE in the RL78/G12 Users Manual.) 2. The self-programming function cannot be used for R5F10266 and R5F10366. Caution When the flash memory is rewritten via a user program, the code flash area and RAM area are used because each library is used. When using the library, refer to RL78 Family Flash Self Programming Library Type01 User s Manual and RL78 Family Data Flash Library Type04 User s Manual. R01DS0193EJ0230 Rev.2.30 Page 2 of 108 Jun 19, 2020