Datasheet RL78/I1A R01DS0171EJ0310 Rev.3.10 RENESAS MCU Oct 31, 2016 True Low Power Platform, High Resolution PWM and Rich Analog, 2.7 V to 5.5 V operation, 32 to 64 Kbyte Flash, for Inverter Control, Digital Power Control and Lighting Control Applications 1. OUTLINE 1.1 Features Ultra-Low Power Technology 16-bit timers KB0 to KB2, and KC0 for PWM output 2.7 V to 5.5 V operation from a single supply 16-bit timers KB0 to KB2: maximum 6 outputs (3 ch 2) Stop (RAM retained): 0.23 A, (LVD enabled): 0.31 Smooth start function, dithering function, forced output A stop function (unsyncronized with comparator or Halt (RTC + LVD): 0.60 A external interrupt) enables OverVoltageProtection, Operating: 156.25 A/MHz OverCurrentProtection and Peak current control, and 16-bit RL78 CPU Core single/interleave PFC function Delivers 41 DMIPS at maximum operating frequency Average resolution < 1 nsec output, 64 MHz (when of 32 MHz using PLL) + dithering option Instruction Execution: 86% of instructions can be executed in 1 to 2 clock cycles 16-bit timer KC0 (3 ch) CISC Architecture (Harvard) with 3-stage pipeline PWM output gating function by interlocking with 16- Multiply Signed & Unsigned: 16 x 16 to 32-bit result in bit timers KB0, KB1, and KB2 1 clock cycle MAC: 16 x 16 to 32-bit result in 2 clock cycles Extended-Function Timers 16-bit barrel shifter for shift & rotate in 1 clock cycle Multi-function 16-bit timers: Up to 8 channels 1-wire on-chip debug function Real-time clock (RTC): 1 channel (full calendar and alarm function with watch correction function) Main Flash Memory Interval Timer: 12-bit, 1 channel Density: 32 KB to 64 KB 15 kHz watchdog timer : 1 channel (window function) Block size: 1 KB On-chip single voltage flash memory with protection Multiple Communication Interfaces from block erase/writing 2 Up to 1 x I C multi-master (SMBus/PMBus support) Self-programming with secure boot swap function Up to 1 x CSI/SPI (7-, 8-bit) and flash shield window function Up to 3 x UART (7-, 8-, 9-bit), DALI Support 1ch(8-, 16-, 17-, 24-bit, Master and Data Flash Memory Slave) Data Flash with background operation Up to 1 x LIN Data flash size: 4 KB Erase Cycles: 1 Million (typ.) Rich Analog Erase/programming voltage: 2.7 V to 5.5 V ADC: Up to 11 channels, 8/10-bit resolution, 2.125 s conversion time RAM Supports 2.7 V 2 KB to 4 KB size options Internal voltage reference (1.45 V) Supports operands or instructions Comparator: High response time 70 ns(typ.), Up to 6 Back-up retention in all modes channels, Internal DAC 3ch 8 bit resolution, window comparator mode High-speed On-chip Oscillator PGA (x4 to x32):6 input 32 MHz with +/ 1% accuracy over voltage (2.7 V to On-chip temperature sensor 5.5 V) and temperature ( 20 C to 85 C) Pre-configured settings: 32 MHz, 24 MHz, 16 MHz, Safety Features (IEC or UL 60730 compliance) 12 MHz, 8 MHz, 6 MHz, 4 MHz, 3 MHz, 2 MHz & 1 Flash memory CRC calculation MHz RAM parity error check RAM/SFR write protection Reset and Supply Management Illegal memory access detection Power-on reset (POR) monitor/generator Clock stop/ frequency detection Low voltage detection (LVD) with 6 setting options ADC self-test (Interrupt and/or reset function) General Purpose I/O Data Memory Access (DMA) Controller 5V tolerant, high-current (up to 8.5 mA per pin) Up to 2 fully programmable channels Open-Drain, Internal Pull-up support Transfer unit: 8- or 16-bit R01DS0171EJ0310 Rev.3.10 Page 1 of 105 Oct 31, 2016 Under development RL78/I1A 1. OUTLINE Operating Ambient Temperature Package Type and Pin Count SSOP: 20, 30, 38 Standard: 40 C to +105 C Extend: 40 C to +125 C ROM, RAM capacities Flash ROM Data flash RAM RL78/I1A 20 pins 30 pins 38 pins Note 64 KB 4 KB 4 KB R5F107AE R5F107DE 32 KB 4 KB 2 KB R5F1076C R5F107AC Note This is about 3 KB when the self-programming function and data flash function are used. R01DS0171EJ0310 Rev.3.10 Page 2 of 105 Oct 31, 2016