Datasheet
RL78/L12 R01DS0157EJ0100
Rev.1.00
RENESAS MCU
2013.01.31
Integrated LCD controller/driver, True Low Power Platform (as low as 62.5 A/MHz, and 0.64 A for RTC +
LVD), 1.6 V to 5.5 V operation, 8 to 32 Kbyte Flash, 31 DMIPS at 24 MHz, for All LCD Based Applications
1. OUTLINE
1.1 Features
Ultra-Low Power Technology LCD Controller/Driver
1.6 V to 5.5 V operation from a single supply Up to 35 seg x 8 com or 39 seg x 4 com
Stop (RAM retained): 0.23 A, (LVD enabled): 0.31 Supports capacitor split method, internal voltage
A boost method and resistance division method
Supports waveform types A and B
Halt (RTC + LVD): 0.64 A
Supports snooze Supports LCD contrast adjustment (16 steps)
Operating: 62.5 A/MHz Supports LCD blinking
LCD operating current (Capacitor split method): 0.12
A
Data Memory Access (DMA) Controller
LCD operating current (Internal voltage boost
Up to 2 fully programmable channels
method): 0.63 A (VDD = 3.0 V)
Transfer unit: 8- or 16-bit
Multiple Communication Interfaces
2
16-bit RL78 CPU Core
Up to 1 I C multi-master
Delivers 31 DMIPS at maximum operating frequency
Up to 2 CSI/SPI (7-, 8-bit)
of 24 MHz
Up to 1 UART (7-, 8-, 9-bit)
Instruction Execution: 86% of instructions can be
Up to 1 LIN
executed in 1 to 2 clock cycles
CISC Architecture (Harvard) with 3-stage pipeline
Extended-Function Timers
Multiply Signed & Unsigned: 16 x 16 to 32-bit result in
Multi-function 16-bit timers: Up to 8 channels
1 clock cycle
Real-time clock (RTC): 1 channel (full calendar and
MAC: 16 x 16 to 32-bit result in 2 clock cycles
alarm function with watch correction function)
16-bit barrel shifter for shift & rotate in 1 clock cycle
Interval Timer: 12-bit, 1 channel
1-wire on-chip debug function
15 kHz watchdog timer: 1 channel (window function)
Code Flash Memory
Rich Analog
Density: 8 KB to 32 KB
ADC: Up to 10 channels, 10-bit resolution, 2.1 s
Block size: 1 KB
conversion time
On-chip single voltage flash memory with protection
Supports 1.6 V
from block erase/writing
Internal voltage reference (1.45 V)
Self-programming with flash shield window function
On-chip temperature sensor
Data Flash Memory
Safety Features (IEC or UL 60730 compliance)
Data flash with background operation
Flash memory CRC calculation
Data flash size: 2 KB size
RAM parity error check
Erase cycles: 1 Million (typ.)
RAM write protection
Erase/programming voltage: 1.8 V to 5.5 V
SFR write protection
Illegal memory access detection
RAM
Clock frequency detection
1 KB and 1.5 KB size options
ADC self-test
Supports operands or instructions
Back-up retention in all modes
General Purpose I/O
5V tolerant, high-current (up to 20 mA per pin)
High-speed On-chip Oscillator
Open-Drain, Internal Pull-up support
24 MHz with +/ 1% accuracy over voltage (1.8 V to
5.5 V) and temperature (20C to 85C)
Operating Ambient Temperature
Pre-configured settings: 24 MHz, 16 MHz, 12 MHz, 8
Standard: 40 C to +85 C
MHz, 4 MHz & 1 MHz
Package Type and Pin Count
Reset and Supply Management
From 7mm x 7mm to 12mm x 12mm
Power-on reset (POR) monitor/generator
QFP: 32, 44, 48, 52, 64
Low voltage detection (LVD) with 14 setting options
QFN: 64
(Interrupt and/or reset function)
R01DS0157EJ0100 Rev.1.00 Page 1 of 77
2013.01.31
RL78/L12 1. OUTLINE
{ ROM, RAM capacities
Flash Data RAM RL78/L12
ROM flash
32 pins 44 pins 48 pins 52 pins 64 pins
32 KB 2 KB 1.5 R5F10RBC R5F10RFC R5F10RGC R5F10RJC R5F10RLC
Note
KB
16 KB 2 KB 1 R5F10RBA R5F10RFA R5F10RGA R5F10RJA R5F10RLA
Note
KB
8KB 2 KB 1 R5F10RB8 R5F10RF8 R5F10RG8 R5F10RJ8
Note
KB
Note In the case of the 1 KB, and 1.5 KB, this is 630 bytes when the self-programming function and data flash
function is used.
Remark The functions mounted depend on the product. See 1.6 Outline of Functions.
R01DS0157EJ0100 Rev.1.00 Page 2 of 77
2013.01.31