Datasheet M16C/63 Group R01DS0033EJ0220 RENESAS MCU Rev.2.20 Nov 01, 2012 1. Overview 1.1 Features The M16C/63 Group microcomputer (MCU) incorporates the M16C/60 Series CPU core and flash memory, employing sophisticated instructions for a high level of efficiency. This MCU has 1 MB of address space (expandable to 4 MB), and it is capable of executing instructions at high speed. In addition, the CPU core boasts a multiplier for high-speed operation processing. This MCU consumes low power, and supports operating modes that allow additional power control. The MCU also uses an anti-noise configuration to reduce emissions of electromagnetic noise and is designed to withstand electromagnetic interference (EMI). By integrating many of the peripheral functions, including the multifunction timer and serial interface, the number of system components has been reduced. 1.1.1 Applications This MCU can be used in audio components, cameras, televisions, household appliances, office equipment, communication devices, mobile devices, industrial equipment, and other applications. R01DS0033EJ0220 Rev.2.20 Page 1 of 115 Nov 01, 2012M16C/63 Group 1. Overview 1.2 Specifications The M16C/63 Group includes 100-pin and 80-pin packages. Table 1.1 to Table 1.4 list specifications. Table 1.1 Specifications for the 100-Pin Package (1/2) Item Function Description M16C/60 Series core (multiplier: 16 bit 16 bit 32 bit, multiply and accumulate instruction: 16 bit 16 bit + 32 bit 32 bit) Number of basic instructions: 91 CPU Central processing unit Minimum instruction execution time: 50.0 ns (f(BCLK) = 20 MHz, VCC1 = VCC2 = 2.7 to 5.5 V) 100.0 ns (f(BCLK) = 10 MHz, VCC1 = VCC2 = 2.1 to below 2.7 V) 200.0 ns (f(BCLK) = 5 MHz, VCC1 = VCC2 = 1.8 V) Operating modes: Single-chip, memory expansion, and microprocessor Memory ROM, RAM, data flash See Table 1.5 Product List. Power-on reset Voltage Voltage detector 3 voltage detection points (detection level of voltage detection 0 and 1 Detection selectable) 4 circuits: Main clock, sub clock, low-speed on-chip oscillator (125 kHz), high-speed on-chip oscillator (40 MHz 10%) Oscillation stop detection: Main clock oscillation stop/restart detection function Clock Clock generator Frequency divider circuit: Divide ratio selectable from 1, 2, 4, 8, and 16 Sub clock frequency divider circuit: Divide ratio selectable from 1 and 2 Power saving features: Wait mode, stop mode Real-time clock Address space: 1 MB External bus interface: 0 to 8 waits inserted, 4 chip select outputs, memory area expansion function (expandable to 4 MB), 3 V and 5 V External Bus Bus memory expansion interfaces Expansion Bus format: Separate bus or multiplexed bus selectable, data bus width selectable (8 or 16 bits), number of address buses selectable (12, 16, or 20) CMOS I/O ports: 85 (selectable pull-up resistors) I/O Ports Programmable I/O ports N-channel open drain ports: 3 Interrupt vectors: 70 Interrupts External interrupt inputs: 17 (NMI, INT 8, key input 8) Interrupt priority levels: 7 15-bit timer 1 (with prescaler) Watchdog Timer Automatic reset start function selectable 4 channels, cycle steal mode DMA DMAC Trigger sources: 43 Transfer modes: 2 (single transfer, repeat transfer) R01DS0033EJ0220 Rev.2.20 Page 2 of 115 Nov 01, 2012