Features Datasheet RX63T Group Renesas MCUs R01DS0087EJ0220 Rev.2.20 Mar 31, 2016 100-MHz 32-bit RX MCU, on-chip FPU, 165 DMIPS, Two 12-bit ADCs (three S/H circuits, double data registers, amplifier, comparator), one 10-bit ADC, simultaneous sampling on 7 channels using three ADCs, 100 MHz PWM (2 three-phase complementary channels + 4 single-phase complementary channels or 3 three-phase complementary channels + 1 single-phase complementary channel) Features 32-bit RX CPU core Max. operating frequency: 100 MHz Capable of 165 DMIPS in operation at 100 MHz Single precision 32-bit IEEE-754 floating point Two types of multiply-and-accumulation unit (between memories and between registers) PLQP0144KA-A 20 20mm, 0.5mm pitch 32-bit multiplier (fastest instruction execution takes one CPU clock PLQP0120KA-A 16 16mm, 0.5mm pitch cycle) PLQP0112JA-A 20 20mm, 0.65mm pitch Divider (fastest instruction execution takes two CPU clock cycles) PLQP0100KB-A 14 14mm, 0.5mm pitch Fast interrupt PLQP0064KB-A 10 10mm, 0.5mm pitch CISC Harvard architecture with 5-stage pipeline PLQP0048KB-A 7 7mm, 0.5mm pitch Variable-length instructions: Ultra-compact code Supports the memory protection unit (MPU) Up to 11 communications interfaces Two types of debugging interfaces: JTAG and FINE (two-line) USB 2.0 full-speed function interface (1 channel) Low-power design and architecture CAN (compliant with ISO11898-1), incorporating 32 mailboxes (1 Single 3.3-V supply or single 5-V supply 3.3-V products can be channel) used with a 5-V analog power supply SCI with multiple functionalities (5 channels) Four low-power modes Choose from among asynchronous mode, clock-synchronous mode, On-chip main flash memory, no wait states 2 smart-card interface mode, simple SPI, simple I C, and extended 100-MHz operation, 10-ns read cycle (no wait states) serial mode. Max. 512 Kbytes 2 I C bus interface for SMBus (2 channels) User code is programmable by USB, SCI, or JTAG. RSPI for high-speed transfer (2 channels) On-chip data flash memory Up to twenty 16-bit timers Max. 32 Kbytes, reprogrammable up to 100,000 times 16-bit MTU3: 100-MHz operation, input capture, output compare, Programming/erasing as background operations (BGOs) three-phase complementary PWM waveform output (2 channels), On-chip SRAM, no wait states phase-counting mode (8 channels) complementary PWM does not burden the CPU. Max. 48 Kbytes 16-bit GPT: 100-MHz operation, input capture, output compare, 4- For instructions and operands channel single-phase complementary PWM waveform output or 1- DMA channel three-phase complementary + 1-channel single-phase DMA: Incorporates four channels complementary output, interlocking with comparator (counter DTC: A single unit can handle transfer on multiple channels. operation, PWM negation control), detection of abnormal oscillation Reset and supply management frequencies (useful for IEC60730 compliance) Power-on reset (POR) (8 channels) complementary PWM does not burden the CPU. Low voltage detection (LVD) with voltage settings 16-bit CMT (4 channels) Clock functions Generation of delays in PWM waveforms (for External crystal oscillator or internal PLL for operation at 4 to 12.5 products with the product ID code 1) MHz The timing with which signals on the 16-bit GPT PWM output pin Internal 125-kHz LOCO rise and fall can be controlled with an accuracy of up to 312 ps (in Dedicated 125-kHz LOCO for the IWDT operation at 100 MHz). Independent watchdog timer Two A/D converters for 1-MHz operation, total of 8 125-kHz LOCO clock operation channels Simultaneous sampling on 7 channels is possible with three units. Useful functions for IEC60730 compliance Self-diagnosis function (useful for IEC60730 compliance) Oscillation-stop detection, frequency measurement, CRC, IWDT, Two 12-bit ADCs: three sample-and-hold circuits, double data self-diagnostic function for the A/D converter, etc. registers, amplifier, comparator (8 channels) External address space One 10-bit ADC (12 channels) 4 CS areas (4 1 Mbyte) One A/D converter for 2-MHz operation, total of 20 Multiplexed address data or separate address lines are selectable per channels area. One 10-bit ADC (20 channels) 8- or 16-bit bus space is selectable per area. 10-bit D/A converter: 2 channels Digital Power Supply Controller-Dedicated Calculation Function (for products with product ID code 1) 16-bit fixed-point calculation function that handles compensatory calculations in the method of digital control for switched-mode power supplies. Register write protection function can protect values in important registers against overwriting. Up to 110 pins for GPIO Open drain, switchable driving ability Operating temp. range 40 C to +85 C 40 C to +105 C R01DS0087EJ0220 Rev.2.20 Page 1 of 186 Mar 31, 2016RX63T Group 1. Overview 1. Overview 1.1 Outline of Specifications Table 1.1 lists the specifications in outline, and Table 1.2 lists the functions of products. Table 1.1 shows an outline of the maximum specifications, and the available peripheral modules and number of channels differ according to the number of pins on the package and the ROM capacity. For details, see Table 1.2, Comparison of Functions for Different Packages. Table 1.1 Outline of Specifications (1/7) Classification Module/Function Description CPU CPU Maximum operating frequency: 100 MHz 32-bit RX CPU Minimum instruction execution time: One instruction per state (cycle of the system clock) Address space: 4-Gbyte linear Register set of the CPU General purpose: Sixteen 32-bit registers Control: Nine 32-bit registers Accumulator: One 64-bit register Basic instructions: 73 Floating-point operation instructions: 8 DSP instructions: 9 Addressing modes: 10 Data arrangement Instructions: Little endian Data: Selectable as little endian or big endian On-chip 32-bit multiplier: 32 32 64 bits On-chip divider: 32 / 32 32 bits Barrel shifter: 32 bits Memory protection unit (MPU) FPU Single precision floating point (32 bits) Data types and floating-point exceptions in conformance with the IEEE754 standard Memory ROM Capacity: 512 Kbytes, 384 Kbytes, 256 Kbytes, 64 Kbytes, 48 Kbytes, 32 Kbytes 100 MHz, no-wait access On-board programming: Programs can be modified through SCI or USB while the MCU is mounted on the board. Off-board programming: Programs can be modified using parallel programmer. (only in 144-, 120-, 112- and 100-pin versions) RAM Capacity: 48 Kbytes, 32 Kbytes, 24 Kbytes, 8 Kbytes 100 MHz, no-wait access 2 E data flash Capacity: 32 Kbytes, 8 Kbytes Programming/erasing: 100,000 times On-board programming: Programs can be modified through SCI or USB while the MCU is mounted on the board. Programming from the user program is possible. MCU operating modes 144-, 120-, 112- and 100-pin versions Single-chip mode, on-chip ROM enabled extended mode, on-chip ROM disabled extended mode (switchable by software) 64- and 48-pin versions Single-chip mode R01DS0087EJ0220 Rev.2.20 Page 2 of 186 Mar 31, 2016