Datasheet Cover S3A1 Microcontroller Group Datasheet Renesas Synergy Platform Synergy Microcontrollers S3 Series All information contained in these materials, including products and product specifications, represents information on the product at the time of publication and is subject to change by Renesas Electronics Corp. without notice. Please review the latest information published by Renesas Electronics Corp. through various means, including the Renesas Electronics Corp. website (S3A1 Microcontroller Group Datasheet High efficiency 48-MHz Arm Cortex -M4 core, 1-MB code flash memory, 192-KB SRAM, Segment LCD Controller, Capacitive Touch Sensing Unit, USB 2.0 Full-Speed Module, 14-bit A/D Converter, 12-bit D/A Converter, security and safety features FeaturesFeatures Arm Cortex-M4 Core with Floating Point Unit (FPU) System and Power Management Armv7E-M architecture with DSP instruction set Low power modes Maximum operating frequency: 48 MHz Realtime Clock (RTC) with calendar and Battery Backup support Support for 4-GB address space Event Link Controller (ELC) Arm Memory Protection Unit (Arm MPU) with 8 regions DMA Controller (DMAC) 4 Debug and Trace: ITM, DWT, FPB, TPIU, ETB Data Transfer Controller (DTC) CoreSight Debug Port: JTAG-DP and SW-DP Key Interrupt Function (KINT) Power-on reset Memory Low Voltage Detection (LVD) with voltage settings 1-MB code flash memory Security and Encryption 8-KB data flash memory (100,000 program/erase (P/E) cycles) 192-KB SRAM AES128/256 Flash Cache (FCACHE) GHASH Memory Protection Unit (MPU) True Random Number Generator (TRNG) Memory Mirror Function (MMF) Human Machine Interface (HMI) 128-bit unique ID Segment LCD Controller (SLCDC) Connectivity - Up to 54 segments 4 commons USB 2.0 Full-Speed Module (USBFS) - Up to 50 segments 8 commons - On-chip transceiver with voltage regulator Capacitive Touch Sensing Unit (CTSU) - Compliant with USB Battery Charging Specification 1.2 Multiple Clock Sources Serial Communications Interface (SCI) 6 Main clock oscillator (MOSC) - UART (1 to 20 MHz when VCC = 2.4 to 5.5 V) - Simple IIC (1 to 8 MHz when VCC = 1.8 to 2.4 V) - Simple SPI (1 to 4 MHz when VCC = 1.6 to 1.8 V) Serial Peripheral Interface (SPI) 2 Sub-clock oscillator (SOSC) (32.768 kHz) 2 I C bus interface (IIC) 3 High-speed on-chip oscillator (HOCO) Controller Area Network (CAN) module (24, 32, 48, 64 MHz when VCC = 2.4 to 5.5 V) Serial Sound Interface Enhanced (SSIE) (24, 32, 48 MHz when VCC = 1.8 to 5.5 V) SD/MMC Host Interface (SDHI) (24, 32 MHz when VCC = 1.6 to 5.5 V) Quad Serial Peripheral Interface (QSPI) Middle-speed on-chip oscillator (MOCO) (8 MHz) External address space Low-speed on-chip oscillator (LOCO) (32.768 kHz) - 8- or 16-bit bus space is selectable per area IWDT-dedicated on-chip oscillator (15 kHz) Analog Clock trim function for HOCO/MOCO/LOCO Clock out support 14-bit A/D Converter (ADC14) 12-bit D/A Converter (DAC12) General Purpose I/O Ports 8-bit D/A Converter (DAC8) 2 (for ACMPLP) Up to 126 input/output pins Low-Power Analog Comparator (ACMPLP) 2 - Up to 3 CMOS input Operational Amplifier (OPAMP) 4 - Up to 123 CMOS input/output Temperature Sensor (TSN) - Up to 11 input/output 5-V tolerant Timers - Up to 2 high current (20 mA) General PWM Timer 32-Bit (GPT32) 4 Operating Voltage General PWM Timer 16-Bit (GPT16) 6 VCC: 1.6 to 5.5 V Asynchronous General-Purpose Timer (AGT) 2 Operating Temperature and Packages Watchdog Timer (WDT) Ta = -40C to +85C Safety - 145-pin LGA (7 mm 7 mm, 0.5 mm pitch) Error Correction Code (ECC) in SRAM - 121-pin BGA (8 mm 8 mm, 0.65 mm pitch) SRAM parity error check - 100-pin LGA (7 mm 7 mm, 0.65 mm pitch) Flash area protection Ta = -40C to +105C ADC self-diagnosis function - 144-pin LQFP (20 mm 20 mm, 0.5 mm pitch) Clock Frequency Accuracy Measurement Circuit (CAC) - 100-pin LQFP (14 mm 14 mm, 0.5 mm pitch) Cyclic Redundancy Check (CRC) calculator - 64-pin LQFP (10 mm 10 mm, 0.5 mm pitch) Data Operation Circuit (DOC) - 64-pin QFN (8 mm 8 mm, 0.4 mm pitch) Port Output Enable for GPT (POEG) Independent Watchdog Timer (IWDT) GPIO readback level detection Register write protection Main oscillator stop detection Illegal memory access R01DS0324EU0120 Rev.1.20 Page 2 of 137 Oct 29, 2018