Datasheet Cover S7G2 Microcontroller Group Datasheet Renesas Synergy Platform Synergy Microcontrollers S7 Series All information contained in these materials, including products and product specifications, represents information on the product at the time of publication and is subject to change by Renesas Electronics Corp. without notice. Please review the latest information published by Renesas Electronics Corp. through various means, including the Renesas Electronics Corp. website (S7G2 Microcontroller Group Datasheet Leading performance 240-MHz Arm Cortex -M4 core, up to 4-MB code flash memory, 640-KB SRAM, Graphics LCD Controller, 2D Drawing Engine, Capacitive Touch Sensing Unit, Ethernet MAC Controller with IEEE 1588 PTP, USB 2.0 High-Speed, USB 2.0 Full-Speed, SDHI, Quad SPI, security and safety features, and advanced analog. FeaturesFeatures Arm Cortex-M4 Core with Floating Point Unit (FPU) System and Power Management Armv7E-M architecture with DSP instruction set Low power modes Maximum operating frequency: 240 MHz Switching regulator Support for 4-GB address space Realtime Clock (RTC) with calendar and VBATT support On-chip debugging system: JTAG, SWD, and ETM Event Link Controller (ELC) DMA Controller (DMAC) 8 Boundary scan and Arm Memory Protection Unit (MPU) Data Transfer Controller (DTC) Memory Key Interrupt Function (KINT) Up to 4-MB code flash memory (80 MHz zero wait states) Power-on reset 64-KB data flash memory (125,000 erase/write cycles) Low Voltage Detection (LVD) with voltage settings Up to 640-KB SRAM Security and Encryption Flash Cache (FCACHE) AES128/192/256 Memory Protection Units (MPU) 3DES/ARC4 Memory Mirror Function (MMF) SHA1/SHA224/SHA256/MD5 128-bit unique ID GHASH Connectivity RSA/DSA/ECC Ethernet MAC Controller (ETHERC) 2 True Random Number Generator (TRNG) Ethernet DMA Controller (EDMAC) Human Machine Interface (HMI) Ethernet PTP Controller (EPTPC) Graphics LCD Controller (GLCDC) USB 2.0 High-Speed Module (USBHS) JPEG Codec - On-chip transceiver 2D Drawing Engine (DRW) - USB battery charge version 1.2 supported Capacitive Touch Sensing Unit (CTSU) USB 2.0 Full-Speed Module (USBFS) Parallel Data Capture Unit (PDC) - On-chip transceiver Serial Communications Interface (SCI) with FIFO 10 Multiple Clock Sources Serial Peripheral Interface (SPI) 2 Main clock oscillator (MOSC) (8 to 24 MHz) 2 I C Bus Interface (IIC) 3 Sub-clock oscillator (SOSC) (32.768 kHz) CAN module (CAN) 2 High-speed on-chip oscillator (HOCO) (16/18/20 MHz) Serial Sound Interface (SSI) 2 Middle-speed on-chip oscillator (MOCO) (8 MHz) SD/MMC Host Interface (SDHI) 2 Low-speed on-chip oscillator (LOCO) (32.768 kHz) Quad Serial Peripheral Interface (QSPI) IWDT-dedicated on-chip oscillator (15 kHz) IrDA interface Clock trim function for HOCO/MOCO/LOCO Sampling Rate Converter (SRC) Clock out support External memory space General-Purpose I/O Ports - 8-bit or 16-bit bus space is selectable per area Up to 172 input/output pins - SDRAM support - Up to 9 CMOS input Analog - Up to 163 CMOS input/output 12-Bit A/D Converter (ADC12) with 3 sample-and-hold circuits - Up to 22 input/output 5 V tolerant each, x2 - Up to 24 high current (20 mA) 12-Bit D/A Converter (DAC12) 2 Operating Voltage High-Speed Analog Comparator (ACMPHS) 6 VCC: 2.7 to 3.6 V Programmable Gain Amplifier (PGA) 6 Temperature Sensor (TSN) Operating Temperature and Packages Timers Ta = 40C to +85C - 224-pin BGA (13 mm 13 mm, 0.8 mm pitch) General PWM Timer 32-Bit Enhanced High Resolution - 176-pin BGA (13 mm 13 mm, 0.8 mm pitch) (GPT32EH) 4 - 145-pin LGA (7 mm 7 mm, 0.5 mm pitch) General PWM Timer 32-Bit Enhanced (GPT32E) 4 Ta = 40C to +105C General PWM Timer 32-Bit (GPT32) 6 - 176-pin LQFP (24 mm 24 mm, 0.5 mm pitch) Asynchronous General-Purpose Timer (AGT) 2 - 144-pin LQFP (20 mm 20 mm, 0.5 mm pitch) Watchdog Timer (WDT) - 100-pin LQFP (14 mm 14 mm, 0.5 mm pitch) Safety SRAM parity error check Flash area protection ADC self-diagnosis function Clock Frequency Accuracy Measurement Circuit (CAC) Cyclic Redundancy Check (CRC) calculator Data Operation Circuit (DOC) Port Output Enable for GPT (POEG) Independent Watchdog Timer (IWDT) GPIO readback level detection Register write protection Main oscillator stop detection Illegal memory access R01DS0262EU0140 Rev.1.40 Page 2 of 116 Aug 6, 2018