DATASHEET X9271 FN8174 Rev 5.00 Single Supply/Low Power/256-Tap/SPI Bus Single, Digitally Controlled (XDCP) October 15, 2015 Potentiometer The X9271 integrates a single, digitally controlled Features potentiometer (XDCP) on a monolithic CMOS integrated 256 Resistor Taps circuit. SPI Serial Interface for Write, Read, and Transfer The digitally controlled potentiometer is implemented by Operations of Potentiometer using 255 resistive elements in a series array. Between each Wiper Resistance, 100 typical at V = 5V element are tap points connected to the wiper terminal CC through switches. The position of the wiper on the array is 16 Nonvolatile Data Registers controlled by the user through the SPI bus interface. The Nonvolatile Storage of Multiple Wiper Positions potentiometer has associated with it a volatile Wiper Counter Register (WCR) and four nonvolatile data registers that can Power-on Recall Loads Saved Wiper Position on be directly written to and read by the user. The contents of Power-up the WCR control the position of the wiper on the resistor Standby Current <3A Max array though the switches. Power-up recalls the contents of V = 2.7V to 5.5V Operation the default data register (DR0) to the WCR. CC 50k End-to-End Resistance The XDCP can be used as a three-terminal potentiometer or as a two-terminal variable resistor in a wide variety of 100-yr Data Retention applications including control, parameter adjustments, and Endurance: 100,000 Data Changes per Bit per Register signal processing. 14-Lead TSSOP Low-power CMOS Pb-Free Plus Anneal Available (RoHS Compliant) Functional Diagram V R CC H WRITE READ 50k ADDRESS TRANSFER POWER-ON RECALL 256 TAPS DATA INC/DEC STATUS WIPER COUNTER BUS SPI POT REGISTER (WCR) INTERFACE BUS INTERFACE AND CONTROL DATA REGISTERS 16 Bytes CONTROL R V W R SS L FN8174 Rev 5.00 Page 1 of 19 October 15, 2015X9271 Ordering Information PART NUMBER PART V LIMITS POTENTIOMETER TEMP. RANGE PACKAGE PKG. CC (Notes 2, 3) MARKING (V) ORGANIZATION (k) (C) Pb-Free DWG. X9271UV14IZ (Note 1) X9271 UVZI 5 10% 50 -40 to +85 14 Ld TSSOP (4.4mm) M14.173 X9271UV14Z (Note 1) X9271 UVZ 5 10% 50 0 to +70 14 Ld TSSOP (4.4mm) M14.173 X9271UV14IZ-2.7 X9271 UVZG 2.7 to 5.5 50 -40 to +85 14 Ld TSSOP (4.4mm) M14.173 X9271UV14IZ-2.7T1 X9271 UVZG 2.7 to 5.5 50 -40 to +85 14 Ld TSSOP (4.4mm) M14.173 X9271UV14Z-2.7 (No longer X9271 UVZF 2.7 to 5.5 50 0 to +70 14 Ld TSSOP (4.4mm) M14.173 available, recommended replacement: X9271UV14IZ-2.7T1) X9271UV14Z-2.7T1 (No longer X9271 UVZF 2.7 to 5.5 50 0 to +70 14 Ld TSSOP (4.4mm) M14.173 available, recommended replacement: X9271UV14IZ-2.7T1) NOTES: 1. Add -T* suffix for tape and reel. Please refer to TB347 for details on reel specifications. 2. These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020. 3. For Moisture Sensitivity Level (MSL), please see device information page for X9271. For more information on MSL please see Tech Brief TB363. X9271 Pin Configuration 14 LD TSSOP TOP VIEW S0 V 1 14 CC A0 R 2 13 L R NC 3 12 H R CS 4 11 W 5 SCK 10 HOLD 6 9 SI A1 V78 WP SS Pin Descriptions PIN NUMBER PIN NAME FUNCTION 1 SO Serial Data Output 2 A0 Device Address 3 NC No Connect 4CS Chip Select 5SCKSerial Clock 6 SI Serial Data Input 7V System Ground SS 8WP Hardware Write Protect 9 A1 Device Address 10 HOLD Device Select. Pause the serial bus. 11 R Wiper Terminal of Potentiometer W 12 R High Terminal of Potentiometer H 13 R Low Terminal of Potentiometer L 14 V System Supply Voltage CC FN8174 Rev 5.00 Page 2 of 19 October 15, 2015