X9315 Low Noise, Low Power, 32 Taps Data Sheet December 21, 2009 FN8179.2 Digitally Controlled Potentiometer Features (XDCP) Solid-state potentiometer The Intersil X9315 is a digitally controlled potentiometer 3-wire serial interface (XDCP). The device consists of a resistor array, wiper 32 wiper tap points switches, a control section, and nonvolatile memory. The wiper position is controlled by a 3-wire interface. - Wiper position stored in nonvolatile memory and recalled on power-up The potentiometer is implemented by a resistor array 31 resistive elements composed of 31 resistive elements and a wiper switching - Temperature compensated network. Between each element and at either end are tap points accessible to the wiper terminal. The position of the - End to end resistance range 20% wiper element is controlled by the CS, U/D, and INC inputs. - Terminal voltage, 0 to V CC The position of the wiper can be stored in nonvolatile Low power CMOS memory and then be recalled upon a subsequent power-up -V = 2.7V or 5V CC operation. - Active current, 80/400A max. The device can be used as a three-terminal potentiometer or - Standby current, 5A max. as a two-terminal variable resistor in a wide variety of High reliability applications including: - Endurance, 100,000 data changes per bit Control - Register data retention, 100 years Parameter Adjustments R values = 10k, 50k, 100k TOTAL Signal Processing Packages - 8 Ld SOIC, MSOP and PDIP Pb-free available (RoHS compliant) Block Diagram U/D 5-Bit R /V 31 H H INC Up/Down V (Supply Voltage) CC Counter CS 30 29 R /V Up/Down H H (U/D) 5-Bit 28 Control Nonvolatile Increment One and R /V W W (INC) Memory of Memory Transfer Thirty Resistor Device Select Gates Array Two (CS) R /V Decoder L L 2 Store and V (Ground) Recall SS 1 V Control CC Circuitry General V SS 0 R /V L L R /V W W Detailed CAUTION: These devices are sensitive to electrostatic discharge follow proper IC Handling Procedures. 1 1-888-INTERSIL or 1-888-468-3774 Intersil (and design) is a registered trademark of Intersil Americas Inc. XDCP is a trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2005, 2009. All Rights Reserved All other trademarks mentioned are the property of their respective owners.X9315 Ordering Information V LIMITS R TEMP RANGE PKG. CC TOTAL PART NUMBER PART MARKING (V) (k) (C) PACKAGE DWG. X9315WMZ (Note 2) DDT 5 10% 10 0 to 70 8 Ld MSOP (Pb-free) M8.118 X9315WMZT1 (Notes 1, 2) DDT 0 to 70 8 Ld MSOP (Pb-free) M8.118 X9315WMIT2 (Note 1) AAX -40 to 85 8 Ld MSOP M8.118 X9315WMIZ (Note 2) AKW -40 to 85 8 Ld MSOP (Pb-free) M8.118 X9315WMIZT1 (Notes 1, 2) AKW -40 to 85 8 Ld MSOP (Pb-free) M8.118 X9315WP X9315WP 0 to 70 8 Ld PDIP MDP0031 X9315WST1 (Note 1) X9315W 0 to 70 8 Ld SOIC M8.15E X9315WSZ (Note 2) X9315W Z 0 to 70 8 Ld SOIC (Pb-free) M8.15 X9315WSZT1 (Notes 1, 2) X9315W Z 0 to 70 8 Ld SOIC (Pb-free) M8.15 X9315WSI X9315W I -40 to 85 8 Ld SOIC M8.15E X9315WSIT1 (Note 1) X9315W I -40 to 85 8 Ld SOIC M8.15E X9315WSIZ (Note 2) X9315W ZI -40 to 85 8 Ld SOIC (Pb-free) M8.15 X9315WSIZT1 (Notes 1, 2) X9315W ZI -40 to 85 8 Ld SOIC (Pb-free) M8.15 X9315UMZ (Note 2) DDS 50 0 to 70 8 Ld MSOP (Pb-free) M8.118 X9315UMZT1 (Notes 1, 2) DDS 0 to 70 8 Ld MSOP (Pb-free) M8.118 X9315UMI AEB -40 to 85 8 Ld MSOP M8.118 X9315UMIT1 (Notes 1, 2) AEB -40 to 85 8 Ld MSOP M8.118 X9315UMIZ (Note 2) DDR -40 to 85 8 Ld MSOP (Pb-free) M8.118 X9315UMIZT1 (Notes 1, 2) DDR -40 to 85 8 Ld MSOP (Pb-free) M8.118 X9315UST2 (Note 1) X9315U 0 to 70 8 Ld SOIC M8.15E X9315USZ (Note 2) X9315U Z 0 to 70 8 Ld SOIC (Pb-free) M8.15 X9315USZT1 (Notes 1, 2) X9315U Z 0 to 70 8 Ld SOIC (Pb-free) M8.15 X9315USIZ (Note 2) X9315U ZI -40 to 85 8 Ld SOIC (Pb-free) M8.15 X9315USIZT1 (Notes 1, 2) X9315U ZI -40 to 85 8 Ld SOIC (Pb-free) M8.15 X9315TMZ (Note 2) DDN 100 0 to 70 8 Ld MSOP (Pb-free) M8.118 X9315TMZT1 (Notes 1, 2) DDN 0 to 70 8 Ld MSOP (Pb-free) M8.118 X9315TMIZ (Note 2) DDL -40 to 85 8 Ld MSOP (Pb-free) M8.118 X9315TMIZT1 (Notes 1, 2) DDL -40 to 85 8 Ld MSOP (Pb-free) M8.118 X9315TSZ (Note 2) X9315T Z 0 to 70 8 Ld SOIC (Pb-free) M8.15 X9315TSZT1 (Notes 1, 2) X9315T Z 0 to 70 8 Ld SOIC (Pb-free) M8.15 X9315TSIZ (Note 2) X9315T ZI -40 to 85 8 Ld SOIC (Pb-free) M8.15 X9315TSIZT1 (Notes 1, 2) X9315T ZI -40 to 85 8 Ld SOIC (Pb-free) M8.15 X9315WMZ-2.7 (Note 2) AOI 2.7 to 5.5 10 0 to 70 8 Ld MSOP (Pb-free) M8.118 X9315WMZ-2.7T1 (Notes 1, 2) AOI 0 to 70 8 Ld MSOP (Pb-free) M8.118 X9315WMI-2.7T2 (Note 1) AAV -40 to 85 8 Ld MSOP M8.118 X9315WMIZ-2.7 (Note 2) AKX -40 to 85 8 Ld MSOP (Pb-free) M8.118 X9315WMIZ-2.7T1 (Notes 1, 2) AKX -40 to 85 8 Ld MSOP (Pb-free) M8.118 X9315WS-2.7 X9315W F 0 to 70 8 Ld SOIC M8.15E FN8179.2 2 December 21, 2009