DATASHEET X9317 FN8183 Rev.10.00 Low Noise, Low Power, 100 Taps, Digitally Controlled Potentiometer (XDCP) Dec 17, 2018 The X9317 is a digitally controlled potentiometer (XDCP). The Features device consists of a resistor array, wiper switches, a control Solid-state potentiometer section, and nonvolatile memory. The wiper position is controlled by a 3-wire interface. 3-wire serial up/down interface The potentiometer is implemented by a resistor array 100 wiper tap points composed of 99 resistive elements and a wiper switching - Wiper position stored in nonvolatile memory and recalled network. Between each element and at either end are tap on power-up points accessible to the wiper terminal. The position of the 99 resistive elements wiper element is controlled by the CS, U/D, and INC inputs. The - Temperature compensated position of the wiper can be stored in nonvolatile memory and then be recalled upon a subsequent power-up operation. - End-to-end resistance range 20% The device can be used as a three-terminal potentiometer for Low power CMOS voltage control or as a two-terminal variable resistor for current -V = 2.7V to 5.5V, and 5V 10% CC control in a wide variety of applications. - Standby current <5A Applications High reliability - Endurance, 100,000 data changes per bit LCD bias control - Register data retention, 100 years DC bias adjustment R values = 10k , 50k , 100k Gain and offset trim TOTAL Packages Laser diode bias control - 8 Ld SOIC, TSSOP, and MSOP Voltage regulator output control Pb-free (RoHS compliant) U/D R 99 H UP/DOWN INC V (SUPPLY VOLTAGE) COUNTER CC CS 98 97 R UP/DOWN H (U/D) 7-BIT 96 ONE CONTROL NONVOLATILE INCREMENT OF R AND W MEMORY (INC) ONE MEMORY WIPER RESISTOR HUNDRED DEVICE SELECT SWITCHES ARRAY DECODER (CS) R L 2 STORE AND V (GROUND) 1 SS RECALL V CC CONTROL GENERAL V CIRCUITRY SS 0 R L R W DETAILED FIGURE 1. BLOCK DIAGRAM FN8183 Rev.10.00 Page 1 of 14 Dec 17, 2018X9317 Ordering Information PART NUMBER V LIMITS R TEMPERATURE PACKAGE PKG. CC TOTAL (Notes 1, 2, 3)PART MARKING (V) (k ) RANGE (C) (RoHS Compliant) DWG. X9317WM8Z DCW 5 10% 10 0 to +70 8 Ld MSOP M8.118 X9317WM8IZ DCT -40 to +85 8 Ld MSOP M8.118 X9317WS8Z X9317W Z 0 to +70 8 Ld SOIC M8.15E X9317WS8IZ X9317W ZI -40 to +85 8 Ld SOIC M8.15E X9317WV8Z 9317W Z 0 to +70 8 Ld TSSOP M8.173 X9317WV8IZ 9317W IZ -40 to +85 8 Ld TSSOP M8.173 X9317US8Z X9317U Z 0 to +70 8 Ld SOIC M8.15E X9317US8IZ X9317U ZI -40 to +85 8 Ld SOIC M8.15E X9317UV8Z 9317U Z 0 to +70 8 Ld TSSOP M8.173 X9317UV8IZ 9317U IZ -40 to +85 8 Ld TSSOP M8.173 X9317WM8Z-2.7 DCX 2.7 to 5.5 10 0 to +70 8 Ld MSOP M8.118 X9317WM8IZ-2.7 DCU -40 to +85 8 Ld MSOP M8.118 X9317WS8Z-2.7 X9317W ZF 0 to +70 8 Ld SOIC M8.15E X9317WS8IZ-2.7 X9317W ZG -40 to +85 8 Ld SOIC M8.15E X9317WV8Z-2.7 9317W FZ 0 to +70 8 Ld TSSOP M8.173 X9317WV8IZ-2.7 AKZ -40 to +85 8 Ld TSSOP M8.173 X9317US8Z-2.7 X9317U ZF 0 to +70 8 Ld SOIC M8.15E X9317US8IZ-2.7 X9317U ZG -40 to +85 8 Ld SOIC M8.15E X9317UV8Z-2.7 9317U FZ 0 to +70 8 Ld TSSOP M8.173 X9317UV8IZ-2.7 9317U GZ -40 to +85 8 Ld TSSOP M8.173 NOTES: 1. Add T1 suffix for tape and reel. Please refer to TB347 for details on reel specifications. 2. These Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020. 3. For Moisture Sensitivity Level (MSL), please see device information page for X9317. For more information on MSL please see tech brief TB363. FN8183 Rev.10.00 Page 2 of 14 Dec 17, 2018