X9400WV24-2.7 Renesas

X9400 Low Noise/Low Power/SPI Bus Data Sheet July 28, 2006 FN8189.3 DESCRIPTION Quad Digitally Controlled Potentiometers (XDCP) The X9400 integrates four digitally controlled potentiometers (XDCPs) on a monolithic CMOS FEATURES integrated circuit. Four potentiometers per package The digitally controlled potentiometer is implemented 64 resistor taps using 63 resistive elements in a series array. Between SPI serial interface for write, read, and transfer each element are tap points connected to the wiper operations of the potentiometer terminal through switches. The position of the wiper on Wiper resistance, 40 typical at 5V. the array is controlled by the user through the SPI Four non-volatile data registers for each serial bus interface. Each potentiometer has potentiometer associated with it a volatile Wiper Counter Register Non-volatile storage of multiple wiper position (WCR) and four nonvolatile Data Registers (DR0-3) Power-on recall. Loads saved wiper position on that can be directly written to and read by the user. power-up. The contents of the WCR controls the position of the Standby current < 1A max wiper on the resistor array through the switches. System V : 2.7V to 5.5V operation CC Power-up recalls the contents of DR0 to the WCR. + Analog V /V : -5V to +5V 10k, 2.5k end to end resistance The XDCP can be used as a three-terminal 100 yr. data retention potentiometer or as a two-terminal variable resistor in Endurance: 100,000 data changes per bit per a wide variety of applications including control, register parameter adjustments, and signal processing. Low power CMOS 24 Ld SOIC and 24 Ld TSSOP Pb-free plus anneal available (RoHS compliant) BLOCK DIAGRAM V CC Pot 0 V SS R0 R1 V /R R0 R1 H0 H0 V+ Wiper Wiper V /R H2 H2 Counter Resistor V- Counter Array Register Register Pot 2 (WCR) (WCR) V /R R2 R3 L0 L0 R2 R3 HOLD V /R L2 L2 CS V /R W0 W0 V /R W2 W2 SCK Interface SO and Control SI 8 Circuitry A0 A1 V /R W1 W1 Data V /R W3 W3 WP R0 R1 R0 R1 V /R Wiper H1 H1 V /R Resistor Wiper H3 H3 Counter Resistor Array Counter Register Array Pot 1 Register (WCR) Pot 3 R2 R3 (WCR) R2 R3 V /R L1 L1 V /R L3 L3 CAUTION: These devices are sensitive to electrostatic discharge follow proper IC Handling Procedures. 1 1-888-INTERSIL or 1-888-468-3774 Intersil (and design) is a registered trademark of Intersil Americas Inc. XDCP is a trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2005-2006. All Rights Reserved All other trademarks mentioned are the property of their respective owners.X9400 Ordering Information POTENTIOMETER TEMPERATURE PART V LIMITS ORGANIZATION RANGE CC PART NUMBER MARKING (V) (k) (C) PACKAGE PKG. DWG. X9400WS24* X9400WS 5 10% 10 0 to +70 24 Ld SOIC (300 mil) M24.3 X9400WS24ZT1 X9400WS Z 0 to +70 24 Ld SOIC (300 mil) (Pb-free) M24.3 (Note) Tape and Reel X9400WS24I* X9400WS I -40 to +85 24 Ld SOIC (300 mil) M24.3 X9400WS24IZ* X9400WS ZI -40 to +85 24 Ld SOIC (300 mil) (Pb-free) M24.3 (Note) X9400WV24* X9400WV 0 to +70 24 Ld TSSOP (4.4mm) MDP0044 X9400WV24I* X9400WV I -40 to +85 24 Ld TSSOP (4.4mm) MDP0044 X9400WV24IZ* X9400WV ZI -40 to +85 24 Ld TSSOP (4.4mm) (Pb-free) MDP0044 (Note) X9400WV24Z* X9400WV Z 0 to +70 24 Ld TSSOP (4.4mm) (Pb-free) MDP0044 (Note) X9400YS24* X9400YS 2.5 0 to +70 24 Ld SOIC (300 mil) M24.3 X9400YS24I* X9400YS I -40 to +85 24 Ld SOIC (300 mil) M24.3 X9400YV24* X9400YV 0 to +70 24 Ld TSSOP (4.4mm) MDP0044 X9400YV24I* X9400YV I -40 to +85 24 Ld TSSOP (4.4mm) MDP0044 X9400YV24IZ* X9400YV ZI -40 to +85 24 Ld TSSOP (4.4mm) (Pb-free) MDP0044 (Note) X9400YV24Z* X9400YV Z 0 to +70 24 Ld TSSOP (4.4mm) (Pb-free) MDP0044 (Note) X9400WS24-2.7* X9400WS F 2.7 to 5.5 10 0 to +70 24 Ld SOIC (300 mil) M24.3 X9400WS24I-2.7* X9400WS G -40 to +85 24 Ld SOIC (300 mil) M24.3 X9400WS24IZ-2.7* X9400WS ZG -40 to +85 24 Ld SOIC (300 mil) (Pb-free) M24.3 (Note) X9400WV24-2.7* X9400WV F 0 to +70 24 Ld TSSOP (4.4mm) MDP0044 X9400WV24I-2.7* X9400WV G -40 to +85 24 Ld TSSOP (4.4mm) MDP0044 X9400WV24IZ-2.7* X9400WV ZG -40 to +85 24 Ld TSSOP (4.4mm) (Pb-free) MDP0044 (Note) X9400WV24Z-2.7* X9400WV ZF 0 to +70 24 Ld TSSOP (4.4mm) (Pb-free) MDP0044 (Note) X9400YS24-2.7* X9400YS F 2.5 0 to +70 24 Ld SOIC (300 mil) M24.3 X9400YS24I-2.7* X9400YS G -40 to +85 24 Ld SOIC (300 mil) M24.3 X9400YV24-2.7* X9400YV F 0 to +70 24 Ld TSSOP (4.4mm) MDP0044 X9400YV24I-2.7* X9400YV G -40 to +85 24 Ld TSSOP (4.4mm) MDP0044 X9400YV24IZ-2.7* X9400YV ZG -40 to +85 24 Ld TSSOP (4.4mm) (Pb-free) MDP0044 (Note) X9400YV24Z-2.7* X9400YV ZF 0 to +70 24 Ld TSSOP (4.4mm) (Pb-free) MDP0044 (Note) *AddT1 suffix for tape and reel. NOTE: Intersil Pb-free plus anneal products employ special Pb-free material sets molding compounds/die attach materials and 100% matte tin plate termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020. FN8189.3 2 July 28, 2006