X9418YV24IZ-2.7 Renesas

X9418 Low Noise/Low Power/2-Wire Bus Data Sheet October 12, 2006 FN8194.3 DESCRIPTION Dual Digitally Controlled Potentiometers (XDCP) The X9418 integrates two digitally controlled potentiometers (XDCP) on a monolithic CMOS FEATURES integrated microcircuit. Two potentiometers in one package The digitally controlled potentiometer is implemented 2-wire serial interface using 63 resistive elements in a series array. Between Register oriented format each element are tap points connected to the wiper Direct Read/Write/Transfer Wiper Position terminal through switches. The position of the wiper on Store as many as Four Positions per the array is controlled by the user through the 2-wire Potentiometer bus interface. Each potentiometer has associated with Power supplies it a volatile Wiper Counter Register (WCR) and 4 V = 2.7V to 5.5V CC nonvolatile Data Registers (DR0:DR3) that can be V+ = 2.7V to 5.5V directly written to and read by the user. The contents V = -2.7V to -5.5V of the WCR controls the position of the wiper on the Low power CMOS resistor array through the switches. Power up recalls Standby current < 1A the contents of DR0 to the WCR. Ideal for Battery Operated Applications High reliability The XDCP can be used as a three-terminal Endurance100,000 Data Changes per Bit per potentiometer or as a two-terminal variable resistor in Register a wide variety of applications including control, Register Data Retention100 years parameter adjustments, and signal processing. 8-bytes of nonvolatile memory 2.5k, 10k resistor array Resolution: 64 taps each potentiometer 24-pin plastic DIP, 24-lead TSSOP and 24-lead SOIC packages Pb-Free plus anneal available (RoHS compliant) BLOCK DIAGRAM V V+ CC R0 R1 V /R V V- H0 H0 SS Wiper Counter Register (WCR) V /R R2 R3 L0 L0 WP V /R SCL W0 W0 SDA Interface and A0 Control A1 8 Circuitry A2 V /R A3 W1 W1 Data R0 R1 V /R Wiper H1 H1 Resistor Counter Array Register XDCP1 (WCR) R2 R3 V /R L1 L1 CAUTION: These devices are sensitive to electrostatic discharge follow proper IC Handling Procedures. 1 1-888-INTERSIL or 1-888-468-3774 Intersil (and design) is a registered trademark of Intersil Americas Inc. XDCP is a trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2005, 2006. All Rights Reserved All other trademarks mentioned are the property of their respective owners.X9418 Ordering Information POTENTIOMET ER TEMPERATU V LIMITS ORGANIZATION RE RANGE CC PART NUMBER PART MARKING (V) (k) (C) PACKAGE PKG. DWG. X9418WV24* X9418WV 5 10% 10 0 to +70 24 Ld TSSOP (4.4MM) MDP0044 X9418WV24Z* (Note) X9418WV Z 0 to +70 24 Ld TSSOP (4.4MM) (Pb-free) MDP0044 X9418WP24I-2.7 X9418WP G 2.7 to 5.5 10 -40 to +85 24 Ld PDIP E24.6 X9418WS24I-2.7 X9418WS G -40 to +85 24 Ld SOIC (300MIL) M24.3 X9418WS24IZ-2.7 (Note) X9418WS ZG -40 to +85 24 Ld SOIC (300MIL) (Pb-free) M24.3 X9418WV24-2.7* X9418WV F 0 to +70 24 Ld TSSOP (4.4MM) MDP0044 X9418WV24Z-2.7* (Note) X9418WV ZF 0 to +70 24 Ld TSSOP (4.4MM) (Pb-free) MDP0044 X9418WV24I-2.7 X9418WV G -40 to +85 24 Ld TSSOP (4.4MM) MDP0044 X9418WV24IZ-2.7 (Note) X9418WV ZG -40 to +85 24 Ld TSSOP (4.4MM) (Pb-free) MDP0044 X9418YS24-2.7 X9418YS F 2.5 0 to +70 24 Ld SOIC (300MIL) M24.3 X9418YS24Z-2.7 (Note) X9418YS ZF 0 to +70 24 Ld SOIC (300MIL) (Pb-free) M24.3 X9418YS24I-2.7 X9418YS G -40 to +85 24 Ld SOIC (300MIL) M24.3 X9418YS24IZ-2.7 (Note) X9418YS ZG -40 to +85 24 Ld SOIC (300MIL) (Pb-free) M24.3 X9418YV24I-2.7* X9418YV G -40 to +85 24 Ld TSSOP (4.4MM) MDP0044 X9418YV24IZ-2.7* (Note) X9418YV ZG -40 to +85 24 Ld TSSOP (4.4MM) (Pb-free) MDP0044 *AddT1 suffix for tape and reel. NOTE: Intersil Pb-free plus anneal products employ special Pb-free material sets molding compounds/die attach materials and 100% matte tin plate termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020. PIN DESCRIPTIONS Potentiometer Pins Host Interface Pins V /R (V /R - V /R ), V /R (V /R - V /R ) H H H0 H0 H1 H1 L L L0 L0 L1 L1 The V /R and V /R inputs are equivalent to the H H L L Serial Clock (SCL) terminal connections on either end of a mechanical The SCL input is used to clock data into and out of the potentiometer. X9418. V /R (V /R - V /R ) W W W0 W0 W1 W1 Serial Data (SDA) The wiper outputs are equivalent to the wiper output of SDA is a bidirectional pin used to transfer data into a mechanical potentiometer. and out of the device. It is an open drain output and may be wire-ORed with any number of open drain or Hardware Write Protect Input (WP) open collector outputs. An open drain output requires The WP pin when low prevents nonvolatile writes to the use of a pull-up resistor. For selecting typical the Data Registers. values, refer to the guidelines for calculating typical values on the bus pull-up resistors graph. Analog Supplies V+, V- The Analog Supplies V+, V- are the supply voltages Device Address (A - A ) 0 3 for the XDCP analog section. The Address inputs are used to set the least significant 4 bits of the 8-bit slave address. A match in the slave address serial data stream must be made with the Address input in order to initiate communication with the X9418. A maximum of 16 devices may occupy the 2-wire serial bus. FN8194.3 2 October 12, 2006