X9430 Programmable Analog PRELIMINARY Data Sheet March 11, 2005 FN8198.0 DESCRIPTION Dual Digitally Controlled Potentiometer (XDCP) with Operational Amplifier The X9430 is a monolithic CMOS IC that incorporates two operational amplifiers and two nonvolatile digitally FEATURES controlled potentiometers. The amplifiers are CMOS differential input voltage operational amplifiers with Two CMOS voltage operational amplifiers near rail-to-rail outputs. All pins for the two amplifiers Two digitally controlled potentiometers are brought out of the package to allow combining Can be combined or used separately them with the potentiometers or using them as com- Amplifiers plete stand-alone amplifiers. Low voltage operation V+/V- = 2.7V to 5.5V The digitally controlled potentiometers consist of a Rail-to-rail CMOS performance series string of 63 polycrystalline resistors that behave 1MHz gain bandwidth product as standard integrated circuit resistors. The SPI serial Digitally controlled potentiometer port, common to both pots, allows the user to program Dual 64 tap potentiometers the connection of the wiper output to any of the resis- R = 10k total tor nodes in the series string. The wiper position is SPI serial interface saved in the on board E2 memory to allow for nonvola- V = 2.7V to 5.5V CC tile restoration of the wiper position. A wide variety of applications can be implemented using the potentiometers and the amplifiers. A typical application is to implement the amplifier as a wiper buffer in circuits that use the potentiometer as a voltage reference. The potentiometer can also be combined with the amplifier yielding a digitally programmable gain amplifier or programmable current source. BLOCK DIAGRAM V R R R CC W0 H0 L0 V+ HOLD V NI0 Control and + Memory V CS OUT0 SCK WCR0 SO V INV0 SI V NI1 A1 + A0 V OUT1 WCR1 V INV1 WP V R R R V- SS W1 L1 H1 CAUTION: These devices are sensitive to electrostatic discharge follow proper IC Handling Procedures. 1 1-888-INTERSIL or 1-888-352-6832 Intersil (and design) is a registered trademark of Intersil Americas Inc. XDCP is a trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2005. All Rights Reserved All other trademarks mentioned are the property of their respective owners. NOT RECOMMENDED FOR NEW DESIGNS NO RECOMMENDED REPLACEMENT contact our Technical Support Center at 1-888-INTERSIL or www.intersil.com/tscX9430 PIN DESCRIPTIONS Device Address (A - A ) 0 1 The address inputs are used to set the least significant Host Interface Pins 2 bits of the 8-bit slave address. A match in the slave address serial data stream must be made with the Serial Output (SO) address input in order to initiate communication with SO is a push/pull serial data output pin. During a read the X9430. A maximum of 4 devices may occupy the cycle, data is shifted out on this pin. Data is clocked SPI serial bus. out by the falling edge of the serial clock. 1 Potentiometer Pins Serial Input (SI) R (R - R ), R (R - R ) SI is the serial data input pin. All opcodes, byte H H0 H1 L L0 L1 addresses and data to be written to the device are The R and R inputs are equivalent to the terminal con- H L input on this pin. Data is latched by the rising edge of nections on either end of a mechanical potentiometer. the serial clock. R (R - R ) W W0 W1 Serial Clock (SCK) The wiper output is equivalent to the wiper output of a The SCK input is used to clock data into and out of the mechanical potentiometer. X9430. Amplifier and Device Pins Chip Select (CS) Amplifier Input Voltage V (0,1) and V (0,1) When CS is HIGH, the X9430 is deselected and the NI INV SO pin is at high impedance, and (unless an internal V and V are inputs to the noninverting (+) and NI INV write cycle is underway) the device will be in the inverting (-) inputs of the operational amplifiers. standby state. CS LOW enables the X9430, placing it in the active power mode. It should be noted that after Amplifier Output Voltage V (0,1) OUT a power-up, a HIGH to LOW transition on CS is V is the voltage output pin of the operational OUT required prior to the start of any operation. amplifier. Hardware Write Protect Input WP Analog Supplies V+, V- The WP pin when low prevents nonvolatile writes to The Analog Supplies V+, V- are the supply voltages the wiper counter register. for the XDCP analog section and the operational amplifiers. Hold (HOLD) HOLD is used in conjunction with the CS pin to select System Supply V and Ground V CC SS the device. Once the part is selected and a serial The system supply V and its reference V is used CC SS sequence is underway, HOLD may be used to pause to bias the interface and control circuits. the serial communication with the controller without resetting the serial sequence. To pause, HOLD must be brought LOW while SCK is LOW. To resume com- munication, HOLD is brought HIGH, again while SCK is LOW. If the pause feature is not used, HOLD should be held HIGH at all times. 1. Alternate designations for R , R , R are V , V , V H L W H L W FN8198.0 2 March 11, 2005