X9440 Mixed Signal with SPI Interface Data Sheet March 28, 2005 FN8200.0 DESCRIPTION Dual Digitally Controlled Potentiometer (XDCP) & Voltage Comparator The X9440 integrates two non volatile digitally con- trolled potentiometers (XDCP) and two voltage com- FEATURES parators on a CMOS monolithic microcircuit. Two digitally controlled potentiometers and two The X9440 contains two resistor arrays, each com- voltage comparators in one package posed of 63 resistive elements. Between each ele- SPI serial interface ment and at either end are tap points accessible to the Register oriented format wiper elements. The position of the wiper element on Direct read/write wiper position the array is controlled by the user through the SPI Store as many as four positions per pot serial bus interface. Fast response comparator Enable, latch, or shutdown comparator outputs Each potentiometer has an associated voltage com- through the ACR parator. The comparator compares the external input Auto-recall of WCR and ACR data from R0 voltage V with the wiper voltage V and sets the out- NI W Hardware write protection, WP put voltage level to a logic high or low. Separate analog and digital/system supplies Each resistor array and comparator has associated Direct write cell with it a wiper counter register (WCR), analog control Endurance100,000 data changes per bit per register (ACR), and eight 6 bit data registers that can register be directly written and read by the user. The contents Register data retention100 years of the wiper counter register controls the position of 16-bytes of EEPROM memory the wiper on the resistor array. The contents of the Power saving feature and low noise analog control register controls the comparator and its Two 10k or two 2.5k potentiometers output. The potentiometer is programmed with a SPI Resolution: 64 taps each pot serial interface. 24-lead TSSOP and 24-Lead SOIC packages BLOCK DIAGRAM V H (0,1) (R -R ) WCR 0 3 0,1 0,1 WP V L (0,1) V SCK W (0,1) S0 Interface and SI Control V NI (0,1) A0 Circuitry A1 CS + V (R -R ) ACR HOLD OUT (0,1) 0 3 0,1 0,1 CAUTION: These devices are sensitive to electrostatic discharge follow proper IC Handling Procedures. 1 1-888-INTERSIL or 1-888-352-6832 Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2005. All Rights Reserved All other trademarks mentioned are the property of their respective owners.X9440 PIN DESCRIPTIONS Potentiometer Pins V (V -V ), V (V -V ) H H0 H3 L L0 L3 Host Interface Pins The V and V inputs are equivalent to the terminal con- H L nections on either end of a mechanical potentiometer. Serial Output (SO) SO is a push/pull serial data output pin. During a read V (V -V ) W W0 W1 cycle, data is shifted out on this pin. Data is clocked The wiper output V is equivalent to the wiper output W out by the falling edge of the serial clock. of a mechanical potentiometer and is connected to the inverting input of the voltage comparator. Serial Input (SI) SI is the serial data input pin. All opcodes, byte Comparator and Device Pins addresses and data to be written to the pots and pot registers are input on this pin. Data is latched by the Voltage Input V , V NI0 NI1 rising edge of the serial clock. V and V are the input voltages to the plus (non- NI0 NI1 inverting) inputs of the two comparators. Serial Clock (SCK) The SCK input is used to clock data into and out of the Buffered Voltage Outputs V , V OUT0 OUT1 X9440. V and V are the buffered voltage comparator OUT0 OUT1 outputs controlled by bits in the volatile analog control Chip Select (CS) register. When CS is HIGH, the X9440 is deselected and the SO pin is at high impedance, and (unless an internal Hardware Write Protect Input WP write cycle is underway) the device will be in the The WP pin when low prevents non volatile writes to standby state. CS LOW enables the X9440, placing it the wiper counter and analog control registers. in the active power mode. It should be noted that after a power-up, a HIGH to LOW transition on CS is Analog Supplies V+, V- required prior to the start of any operation. The Analog Supplies V+, V- are the supply voltages for the XDCP analog section and the voltage comparators. Hold (HOLD) HOLD is used in conjunction with the CS pin to select System Supply V and Ground V CC SS the device. Once the part is selected and a serial The system supply, V and its reference V is used CC SS sequence is underway, HOLD may be used to pause to bias the interface and control circuits. the serial communication with the controller without resetting the serial sequence. To pause, HOLD must be brought LOW while SCK is LOW. To resume com- munication, HOLD is brought HIGH, again while SCK is LOW. If the pause feature is not used, HOLD should be held HIGH at all times. Device Address (A -A ) 0 1 The address inputs are used to set the least significant 2 bits of the 8-bit slave address. A match in the slave address serial data stream must be made with the Address input in order to initiate communication with the X9440. A maximum of 4 devices may share the same SPI serial bus. FN8200.0 2 March 28, 2005