DATASHEET Low Noise, Low Power, 100 Taps, Digitally Controlled Potentiometer (XDCP) X9317 Features The Intersil X9317 is a digitally controlled potentiometer Solid-state potentiometer (XDCP). The device consists of a resistor array, wiper 3-wire serial up/down interface switches, a control section, and nonvolatile memory. The wiper 100 wiper tap points position is controlled by a 3-wire interface. - Wiper position stored in nonvolatile memory and recalled The potentiometer is implemented by a resistor array on power-up composed of 99 resistive elements and a wiper switching 99 resistive elements network. Between each element and at either end are tap points accessible to the wiper terminal. The position of the - Temperature compensated wiper element is controlled by the CS, U/D, and INC inputs. The - End-to-end resistance range 20% position of the wiper can be stored in nonvolatile memory and Low power CMOS then be recalled upon a subsequent power-up operation. -V = 2.7V to 5.5V, and 5V 10% CC The device can be used as a three-terminal potentiometer for - Standby current <5A voltage control or as a two-terminal variable resistor for current control in a wide variety of applications. High reliability - Endurance, 100,000 data changes per bit Applications - Register data retention, 100 years LCD bias control R values = 10k , 50k , 100k TOTAL DC bias adjustment Packages Gain and offset trim - 8 Ld SOIC, TSSOP, and MSOP Laser diode bias control Pb-free (RoHS compliant) Voltage regulator output control U/D 99 R H UP/DOWN INC V (SUPPLY VOLTAGE) COUNTER CC CS 98 97 UP/DOWN R H (U/D) 7-BIT 96 ONE CONTROL NONVOLATILE INCREMENT OF R AND W MEMORY (INC) ONE MEMORY WIPER RESISTOR HUNDRED DEVICE SELECT SWITCHES ARRAY DECODER (CS) R L 2 STORE AND V (GROUND) 1 SS RECALL V CC CONTROL V GENERAL CIRCUITRY SS 0 R L R W DETAILED FIGURE 1. BLOCK DIAGRAM November 4, 2014 CAUTION: These devices are sensitive to electrostatic discharge follow proper IC Handling Procedures. 1 1-888-INTERSIL or 1-888-468-3774 Copyright Intersil Americas LLC 2004, 2005, 2008, 2009, 2012, 2014. All Rights Reserved FN8183.9 Intersil (and design) and XDCP are trademarks owned by Intersil Corporation or one of its subsidiaries. All other trademarks mentioned are the property of their respective owners.X9317 Ordering Information PART NUMBER V LIMITS R TEMPERATURE PACKAGE PKG. CC TOTAL (Notes 1, 2, 3)PART MARKING (V) (k ) RANGE (C) (Pb-Free) DWG. X9317WM8Z DCW 5 10% 10 0 to +70 8 Ld MSOP M8.118 X9317WM8IZ DCT -40 to +85 8 Ld MSOP M8.118 X9317WS8Z X9317W Z 0 to +70 8 Ld SOIC M8.15E X9317WS8IZ X9317W ZI -40 to +85 8 Ld SOIC M8.15E X9317WV8Z 9317W Z 0 to +70 8 Ld TSSOP M8.173 X9317WV8IZ 9317W IZ -40 to +85 8 Ld TSSOP M8.173 X9317UM8Z DCS 50 0 to +70 8 Ld MSOP M8.118 X9317UM8IZ DCR -40 to +85 8 Ld MSOP M8.118 X9317US8Z X9317U Z 0 to +70 8 Ld SOIC M8.15E X9317US8IZ X9317U ZI -40 to +85 8 Ld SOIC M8.15E X9317UV8Z 9317U Z 0 to +70 8 Ld TSSOP M8.173 X9317UV8IZ 9317U IZ -40 to +85 8 Ld TSSOP M8.173 X9317TM8Z DCN 100 0 to +70 8 Ld MSOP M8.118 X9317TM8IZ DCL -40 to +85 8 Ld MSOP M8.118 X9317TS8Z X9317T Z 0 to +70 8 Ld SOIC M8.15E X9317TS8IZ X9317T ZI -40 to +85 8 Ld SOIC M8.15E X9317TV8Z 9317T Z 0 to +70 8 Ld TSSOP M8.173 X9317TV8IZ 9317T IZ -40 to +85 8 Ld TSSOP M8.173 X9317WM8Z-2.7 DCX 2.7 to 5.5 10 0 to +70 8 Ld MSOP M8.118 X9317WM8IZ-2.7 DCU -40 to +85 8 Ld MSOP M8.118 X9317WS8Z-2.7 X9317W ZF 0 to +70 8 Ld SOIC M8.15E X9317WS8IZ-2.7 X9317W ZG -40 to +85 8 Ld SOIC M8.15E X9317WV8Z-2.7 9317W FZ 0 to +70 8 Ld TSSOP M8.173 X9317WV8IZ-2.7 AKZ -40 to +85 8 Ld TSSOP M8.173 X9317UM8Z-2.7 AOB 50 0 to +70 8 Ld MSOP M8.118 X9317UM8IZ-2.7 AOH -40 to +85 8 Ld MSOP M8.118 X9317US8Z-2.7 X9317U ZF 0 to +70 8 Ld SOIC M8.15E X9317US8IZ-2.7 X9317U ZG -40 to +85 8 Ld SOIC M8.15E X9317UV8Z-2.7 9317U FZ 0 to +70 8 Ld TSSOP M8.173 X9317UV8IZ-2.7 9317U GZ -40 to +85 8 Ld TSSOP M8.173 X9317TM8Z-2.7 DCP 100 0 to +70 8 Ld MSOP M8.118 X9317TM8IZ-2.7 DCM -40 to +85 8 Ld MSOP M8.118 X9317TS8Z-2.7 X9317T ZF 0 to +70 8 Ld SOIC M8.15E X9317TS8IZ-2.7 X9317T ZG -40 to +85 8 Ld SOIC M8.15E X9317TV8Z-2.7 9317T FZ 0 to +70 8 Ld TSSOP M8.173 X9317TV8IZ-2.7 9317T GZ -40 to +85 8 Ld TSSOP M8.173 NOTES: 1. Add T1 suffix for tape and reel. Please refer to TB347 for details on reel specifications. 2. These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil Pb- free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC JSTD-020. 3. For Moisture Sensitivity Level (MSL), please see device information page for X9317. For more information on MSL please see tech brief TB363. Submit Document Feedback FN8183.9 2 November 4, 2014