DATASHEET X9319 FN8185 Rev 3.00 Digitally Controlled Potentiometer (XDCP) July 31, 2014 The Intersil X9319 is a digitally controlled potentiometer Features (XDCP). The device consists of a resistor array, wiper Solid-state potentiometer switches, a control section, and nonvolatile memory. The wiper position is controlled by a 3-wire interface. 3-wire serial interface The potentiometer is implemented by a resistor array Terminal voltage, 0 to +10V composed of 99 resistive elements and a wiper switching 100 wiper tap points network. Between each element and at either end are tap - Wiper position stored in nonvolatile memory and points accessible to the wiper terminal. The position of the recalled on power-up wiper element is controlled by the CS, U/D, and INC inputs. 99 resistive elements The position of the wiper can be stored in nonvolatile - Temperature compensated memory and then be recalled upon a subsequent power-up operation. - End-to-end resistance range 20% Low power CMOS The device can be used as a three-terminal potentiometer for voltage control or as a two-terminal variable resistor for -V = 5V CC current control in a wide variety of applications. - Active current, 3mA max. - Standby current, 1mA max. Applications High reliability LCD bias control - Endurance, 100,000 data changes per bit - Register data retention, 100 years DC bias adjustment R value = 10k Gain and offset trim TOTAL Package Laser diode bias control - 8 Ld SOIC Voltage regulator output control Pb-free (RoHS compliant) Block Diagram U/D R 99 H UP/DOWN INC V (SUPPLY VOLTAGE) COUNTER CC CS 98 97 R UP/DOWN H (U/D) 7-BIT 96 CONTROL NONVOLATILE ONE OF INCREMENT R AND W MEMORY ONE (INC) MEMORY HUNDRED WIPER RESISTOR DECODER SWITCHES DEVICE SELECT ARRAY (CS) R L 2 STORE AND V (GROUND) RECALL 1 SS V CC CONTROL GENERAL V SS CIRCUITRY 0 R L R W DETAILED FN8185 Rev 3.00 Page 1 of 8 July 31, 2014X9319 Ordering Information PART NUMBER PACKAGE (Notes 1, 2, 3) PART MARKING R (k) TEMP RANGE (C) (Pb-Free) PKG. DWG. TOTAL X9319WS8Z X9319W Z 10 0 to +70 8 Ld SOIC (150 mil) M8.15E X9319WS8IZ X9319W ZI -40 to +85 8 Ld SOIC (150 mil) M8.15E NOTES: 1. AddT1 suffix for tape and reel. 2. Intersil Pb-free plus anneal products employ special Pb-free material sets molding compounds/die attach materials and 100% matte tin plate termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020. 3. For Moisture Sensitivity Level (MSL), please see product information page for X9319. For more information on MSL, please see tech brief TB363. Pin Configuration X9319 (8 LD SOIC) TOP VIEW INC V 1 8 CC U/D 2 7 CS R R 3 6 L H V R SS 4 5 W Pin Descriptions SOIC SYMBOL BRIEF DESCRIPTION 1INC Increment. Toggling INC while CS is low moves the wiper either up or down. 2U/D Up/Down. The U/D input controls the direction of the wiper movement. 3R The high terminal is equivalent to one of the fixed terminals of a mechanical potentiometer. H 4V Ground. SS 5R The wiper terminal is equivalent to the movable terminal of a mechanical potentiometer. W 6 The low terminal is equivalent to one of the fixed terminals of a mechanical potentiometer. R L 7CS Chip Select. The device is selected when the CS input is LOW, and deselected when CS is high. 8V Supply Voltage. CC FN8185 Rev 3.00 Page 2 of 8 July 31, 2014