RT9174GS Richtek

RT9174 Triple Linear Regulator Controllers General Description Features zz z zz Integrated Three Linear Controllers in a SOP-8 The RT9174 is a triple linear regulator controller designed Package for motherboard application. zz z zz Driving NPN or NMOSFET The regulators are intended to regulate the computer zz z zz Sourcing ( > 100mA) and Sinking ( > 5mA) Driver system AGP (2X/4X) power, the 2.5V clock power, and the zz z zz Tri-State Output Driver 1.8V power for North/South Bridge core voltage and/or cache zz z zz Low Internal 0.8V Reference memory circuits. All controllers can drive NPN or zz z zz Adjustable Output Voltage Setting NMOSFET pass transistor. A special scheme employing zz z zz High Output Stability driver voltage could be higher than V when driving DD zz z zz V 1.5/3.3V Automatic Changing for AGP DDQ NMOSFET through the 12V power. zz z zz Wide 3V to 8V Input Voltage Range The RT9174 future a small SOP-8 package for saving board zz z zz Current Limiting and Thermal Protection area. It also builds in current limiting and thermal shutdown zz z zz RoHS Compliant and 100% Lead (Pb)-Free protection function. Applications Ordering Information z Mother Boards Power Supply RT9174 z Graphic Cards Package Type Pin Configurations S : SOP-8 Lead Plating System (TOP VIEW) P : Pb Free VDD 8 DRI 3 G : Green (Halogen Free and Pb Free) DRI 1 2 7 FB3 Note : FB1 3 6 DRI 2 Richtek products are : GND 4 5 FB2 RoHS compliant and compatible with the current require- SOP-8 ments of IPC/JEDEC J-STD-020. Suitable for use in SnPb or Pb-free soldering processes. Function Block Diagram OC Thermal Limit VDD + DRI2 - OC - + + DRI1 - FB2 OC - + + DRI3 FB1 - - + GND FB3 0.8V 1.3V Reference DS9174-08 April 2011 www.richtek.com 1+ + + + + RT9174 Typical Application Circuit 5V C1 12V 1uF C1 3.3V 1uF R1 Q3 5K 3.3V 18 VDD DRI3 2SD1802 7 2 V O3 Q1 DRI1 FB3 R6 PHD45N03LT 2.5V 424 Q2 C3 6 3 V FB1 DRI2 DDQ 2SD1802 R7 470uF 200 1.5 / 3.3V V O2 4 5 C6 GND FB2 R4 1.8V R1 250 1K 10nF C3 R5 RT9174 470uF D1 200 C2 1000uF 1N4148 TYPEDET R1 3.3V R8 1K 1K VDDQ = 3.3V if FB1>1.3V TYPEDET = 0V to VDDQ = 1.5V TYPEDET = Open to VDDQ = 3.3V Figure 1. Triple LDOs with VDDQ for M/B Application R9 5V V 1K TTPG C1 R10 12V 1uF Q3 C1 C8 MMBT3904 1K 1uF R1 0.01uF 5K 3.3V 18 VDD DRI3 7 2 Q1 DRI1 FB3 3.3V PHD45N03LT Q2 6 3 V FB1 DRI2 DDQ 2SD1802 1.5 / 3.3V V 4 5 TT C6 GND FB2 R4 R2 R6 250 4.3K 10nF C3 3K R5 RT9174 R11 470uF D1 200 C7 C2 374 R12 1uF 1000uF 8.2K 1N4148 TYPEDET R3 3.3V V TTESL R8 4.99K 1K Figure 2. Dual LDOs with V for VRM 8.5 Application TTPG www.richtek.com DS9174-08 April 2011 2