Datasheet 0.95V to V -1V, 0.5A/1.0A 1ch CC Ultra Low Dropout Linear Reg ulators BD3540NUV BD3541NUV General Description Key Specifications The BD3540NUV, BD3541NUV are ultra low-dropout IN Input Voltage Range: 0.95V to VCC-1V linear chipset regulator that operate from a very low VCC Input Voltage Range: 3.0V to 5.5V input supply. They offer ideal performance in low input Output Voltage Range: 0.65V to V -0.3V IN voltage to low output voltage applications. The Output Current: input-to-output voltage difference is minimized by BD3540NUV 0.5A (Max) using a built-in N-Channel power MOSFET with a BD3541NUV 1.0A (Max) maximum ON-Resistance of RON=400m(Typ), ON-Resistance: 200m(Typ). By lowering the dropout voltage, the BD3540NUV 400m(Typ) regulator realizes high output current (I =0.5A to BD3541NUV 200m(Typ) OUTMAX 1.0A) thereby, reducing conversion loss, making it Standby Current: 0A (Typ) comparable to a switching regulator and its power Operating Temperature Range: -10C to +100C transistor, choke coil, and rectifier diode constituents. The BD3540NUV, BD3541NUV are available in Package W(Typ) x D(Typ) x H(Max) significantly downsized package profiles and allow low-cost design. An external resistor allows the entire range of output voltage configurations between 0.65V and 2.7V, while the NRCS (soft start) function enables a controlled output voltage ramp-up, which can be programmed to a required power supply sequence. Features High-Precision Voltage Regulator (0.65V 1%) Built-in VCC Undervoltage Lockout Circuit NRCS (soft start) Function Reduces the Magnitude of In-rush Current VSON010V3030 Internal N-Channel MOSFET Driver Offers Low 3.00mm x 3.00mm x 1.00mm ON-Resistance Built-in Current Limit Circuit Built-in Thermal Shutdown (TSD) Circuit Applications Variable Output Notebook computers, Desktop computers, LCD-TV, Tracking Function DVD, Digital appliances Typical Application Circuit, Block Diagram V CC C 1 1 Current IN UVLO 5 EN Reference CL IN Limit 2 Block C 2 V CC AMP OUT OUT 6 CL C FB UVLO EN 7 TSD R 1 OUT Thermal 8 C Shutdown 3 FB NRCS R 2 TSD Power Good 10 4 9 3 PGDLY PG NRCS GND CNRCS CPGDLY Product structureSilicon monolithic integrated circuit This product has no designed protection against radioactive rays w ww.rohm.com TSZ02201-0J2J0A601130-1-2 2016 ROHM Co., Ltd. All rights reserved. 1/24 TSZ2211114001 14.Jun.2018 Rev.003 BD3540NUV BD3541NUV Pin Descriptions Pin No. Pin Name PIN Function 1 VCC Power supply pin 2 EN Enable input pin 3 PG Power Good pin 4 PGDLY Power Good Delay capacitor connection pin 5 IN Input voltage pin 6 OUT Output voltage pin 7 OUT Output voltage pin 8 FB Reference voltage feedback pin 9 NRCS Capacitor connection pin for Non Rush Current on Start-up 10 GND Ground pin Description of Blocks 1. AMP This is an error amp that compares the reference voltage (0.65V) with FB voltage to drive the output N-Channel FET. (Ron=400m :BD3540NUV,Ron=200m :BD3541NUV) Frequency optimization aids in attaining rapid transient response, and to support the use of ceramic capacitors on the output. The AMP output voltage ranges from GND to VCC. When EN is OFF, or when UVLO is active, output goes LOW and the output of the N-Channel FET switches OFF. 2. EN The EN block controls the ON and OFF state of the regulator via the EN logic input pin. During OFF state, circuit voltage stabilizes at 0A which minimizes the current consumption during standby mode. The FET is switched ON to enable discharge of the NRCS and OUT, thereby draining the excess charge and preventing the load side of an IC from malfunctioning. Since there is no electrical connection required (e.g. between the VCC pin and the ESD prevention diode), module operation is independent of the input sequence. 3. UVLO To prevent malfunctions that can occur during a sudden decrease in VCC, the UVLO circuit switches the output OFF, and (like the EN block) discharges NRCS and OUT. Once the UVLO threshold voltage (TYP2.5V) is reached, the power-ON reset is triggered and output is restored. 4. Current Limit During ON state, the current limit function monitors the output current of the IC against the current limit value (0.5A or more: BD3540NUV,1.0A or more for BD3541NUV). When output current exceeds this value, this block lowers the output current to protect the load of the IC. When it overcomes the overcurrent state, output voltage is restored to the normal value. 5. NRCS (Non Rush Current on Start-up) The soft start function is enabled by connecting an external capacitor between the NRCS pin and GND. Output ramp-up can be set for any period up to the time the NRCS pin reaches VFB (0.65V). During startup, the NRCS pin serves as a 20A (TYP) constant current source to charge the external capacitor. Output start time is calculated by formula (1) below. 0.65V t C 1 20A Tracking sequence is possible by connecting the NRCS output to an external power supply instead of external capacitor. And then, ratio-metric sequence is also available by changing the resistor-divider ratio of external power supply voltage. (See page 13) 6. TSD (Thermal Shut down) The shutdown (TSD) circuit automatically latched OFF when the chip temperature exceeds the threshold temperature after the programmed time period elapses, thus protecting the IC against thermal runaway and heat damage. Since the TSD circuit is designed only to shut down the IC in the occurrence of extreme heat, it is important that the Tj (max) parameter should not be exceeded in the thermal design, in order to avoid potential problems with the TSD. 7. IN The IN line acts as the major current supply line, and is connected to the output N-Channel FET drain. Since there is no electrical connection (such as between the VCC pin and the ESD protection diode)required, IN operates independent of the input sequence. However, since an output N-Channel FET body diode exists between IN and OUT, a V -V electric (diode) connection is present. Therefore, that when output is switched ON or OFF, reverse current IN OUT may flow from OUT to IN. www.rohm.com TSZ02201-0J2J0A601130-1-2 2016 ROHM Co., Ltd. All rights reserved. 2/24 TSZ2211115001 14.Jun.2018 Rev.003