Hi-performance Regulator IC Series for PCs PGOOD IC for PC No.09030EBT18 BD4140HFV Description BD4140HFV is 1ch reset IC for watching the voltage. The detected voltage is 0.5V, and it is available to several kinds of voltage with additional external resistance. For the independent supply voltage (VCC), the L level of voltage is guaranteed in case the watching input voltage is also low. Features 1) Open drain output type 2) Built in Under Voltage LockOut (UVLO) circuit 3) HVSOF5 package : 1.61.6 0.6(mm) Applications Laptop PC, Desktop PC, LCD-TV, Printer, STV, Digital appliances Absolute maximum ratings (Ta=25) Parameter Symbol BD4140HFVUnit *1 Terminal voltage VCC, IN, DLY, PGOOD 6 V *2 Power Dissipation Pd 0.67 W IPGOOD 5 mA PGOOD Capacity Current Operating temperature range Topr -10+100 Storage temperature range Tstg -55+150 Junction Temperature Tjmax +150 *1 Do not however exceed Pd. *2 Reduced by = 186.6W for increase in Ta of 1 over 25. ja (when mounted on a board 70.0mm70mm1.6mm Glass-epoxy PCB which has 1 layer. (copper foil density :2%)) *3 Reduced by = 185.2W for increase in Ta of 1 over 25 ja (when mounted on a board 70.0mm70mm1.6mm Glass-epoxy PCB which has 1 layer.) Operating Conditions (Ta=25 ) Parameter Symbol Min. Max. Unit VCC 3.0 5.5 V IN -0.3 V-2 V CC Terminal voltage PGOOD -0.3 5.5 V DLY -0.3 V V CC ELECTRICAL CHARACTERISTICS (Unless otherwise noted, Ta=25, VCC=5V) Limits Parameter Symbol Unit Conditions Min. Typ. Max. Bias Current Icc - 5 10 A - Detected Voltage VDET 491 500 509 mV IN sweep up Hysteresis Voltage VHYS - 10 - mV IN sweep down Delay Current IDLY 150 250 350 nA IN=0.6V PGOOD Output ON Resistance RVOUT - 100 200 IN=0V PGOODOutput Leak Current IOUT - 0 5 A IN=0.6V www.rohm.com 2009.04 - Rev.B 1/8 2009 ROHM Co., Ltd. All rights reserved. Technical Note BD4140HFV Block Diagram VCC 3 UVLO VDD R3 PGOOD The recommended total R1 IN resistance value for R1 1 4 and R2 is within 300k. DELAY R3 should be set not to be affected by R2 leakeage current MAX 5 A and 0.5V power current 5mA. DLY Please set C1 with 5 double of MIN Delay Time. C1 2 GND Pin Layout PGOOD DLY 1 5 GND 2 VCC IN 3 4 Pin Function Table PIN No. PIN Name PIN Function 1 PGOOD Reset Output Pin (Power Good Signal) 2 GND Ground Pin 3 Vcc Power Supply Input Pin 4 IN Watching Voltage Input Pin 5 DLY Capacitor connected pin for setting delay time Bottom FIN Substrate www.rohm.com 2009.04 - Rev.B 2/8 2009 ROHM Co., Ltd. All rights reserved.