BU91796MUF-ME2 ROHM

Datasheet Low Duty LCD Segment Driver for Automotive Application BU91796xxx-M Series MAX 80 Segments (SEG20COM4) General Description Key Specifications BU91796MUF-M and BU91796FS-M are a 1/4 duty Supply Voltage Range: +2.5V to +6.0V general-purpose LCD driver that can be used for Operating Temperature Range: -40C to +105C automotive applications and can drive up to 80 LCD Max Segments: 80Segments Segments. Display Duty: 1/4 It can support operating temperature of up to +105C and Bias: 1/3 qualified for AEC-Q100 Grade2, as required for Interface: 2wire Serial Interface automotive applications. Wettable flank QFN package is suitable for small Special Characteristics footprint applications and provides significant ESD(HBM): 2000V advantages in inspectability and solder joint reliability. Latch-up current: 100mA Features Package W (Typ) x D (Typ) x H (Max) (Note) AEC-Q100 Qualified Integrated RAM for Display Data (DDRAM): 20 x 4 bit (Max 80 Segment) LCD Drive Output: 4 Common Output, Max 20 Segment Output Integrated Buffer AMP for LCD Driving Integrated Oscillator Circuit No External Components Low Power Consumption Design VQFN32FV5050 (Note) Grade 2 5.0mm x 5.0mm x 1.0mm Applications Instrument Clusters Climate Controls Car Audios / Radios Metering White Goods Healthcare Products Battery Operated Applications etc. SSOP-A32 13.6mm x 7.8mm x 2.01mm Typical Application Circuit VDD C > 0.1F VDD COM0 VLCD COM1 COM2 COM3 SDA Controller Segment SCL LCD SEG0 SEG1 OSCIN TEST1 Insert Capacitors between VDD and VSS TEST2 VSS SEG19 Internal Clock Mode Figure 1. Typical Application Circuit Product structureSilicon monolithic integrated circuit This product has no designed protection against radioactive rays. www.rohm.com TSZ02201-0P4P0D3P01020-1-2 2015ROHM Co., Ltd. All rights reserved. 1/27 TSZ2211114001 06.Feb.2017 Rev.002 Datasheet BU91796xxx-M Series MAX 80 segments (SEG20COM4) Block Diagram / Pin Configuration / Pin Description BU91796MUF-M COM 0 COM 3 SEG 0 SEG 19 VDD LCD voltage generator Common Segment Driver Driver COM2 25 16 SEG13 LCD BIAS COM3 26 15 SEG12 SELECTOR VLCD 27 14 SEG11 Common Blink Timing DDRAM Counter Generator VDD 28 13 SEG10 EXT-PAD VSS 29 12 SEG9 VLCD TEST1 30 11 SEG8 TEST2 31 10 SEG7 Command Command OSCIN Register Data Decoder OSCIN 32 9 SEG6 OSCILLATOR Power On Reset Serial Interface IF FILTER VSS TEST1 TEST2 SDA SCL Figure 2. Block Diagram Figure 3. Pin Configuration (TOP VIEW) Table 1. Pin Description Handling Pin Name Pin No. I/O Function when unused Test input (ROHM use only) TEST1 30 I VSS Must be connected to VSS POR enable setting (Note1) TEST2 31 I VDD: POR disenable VSS VSS: POR enable External clock input OSCIN 32 I External clock and Internal clock can be selected by command VSS Must be connected to VSS when using internal oscillator SDA 2 I/O Serial data in-out terminal - SCL 1 I Serial clock terminal - VSS 29 - Ground - VDD 28 - Power supply - VLCD 27 - Power supply for LCD driving - SEG0 to SEG19 3 to 22 O SEGMENT output for LCD driving OPEN COM0 to COM3 23 to 26 O COMMON output for LCD driving OPEN (Note2) EXT-PAD - Substrate OPEN/VSS (Note1) This function is guaranteed by design, not tested in production process. Software Reset is necessary to initialize IC in case of TEST2=VDD. (Note2) To radiate heat, Contact a board with the EXT-PAD which is located at the bottom side of VQFN32FV5050 package. Supply VSS level or Open state as the input condition for this PAD. www.rohm.com TSZ02201-0P4P0D3P01020-1-2 2015 ROHM Co., Ltd. All rights reserved. 2/27 TSZ2211115001 06.Feb.2017 Rev.002 SCL 1 24 COM1 SDA 2 23 COM0 SEG0 3 22 SEG19 SEG1 4 21 SEG18 SEG2 5 20 SEG17 SEG3 6 19 SEG16 SEG4 7 18 SEG15 SEG5 8 17 SEG14