Dear customer st LAPIS Semiconductor Co., Ltd. LAPIS Semiconducto), on the 1 day of October, 2020, implemented the incorporation-type company split (shinsetsu-bunkatsu) in which LAPIS established a new company, LAPIS Technology Co., Ltd. (LAPIS Technology) and LAPIS Technology succeeded LAPIS Semiconductors LSI business. Therefore, all references toLAPIS Semiconductor Co., Ltd,LAPIS Semiconducto and/orLAPI in this document shall be replaced withLAPIS Technology Co., Ltd Furthermore, there are no changes to the documents relating to our products other than the company name, the company trademark, logo, etc. Thank you for your understanding. LAPIS Technology Co., Ltd. October 1, 2020 FEDL610Q174-01 Issue Date: Oct 25, 2013 ML610Q174 The low power micro controller corresponding to 5v for household appliances I GENERAL DESCRIPTION This LSI is a high-performance 8-bit CMOS microcontroller into which rich peripheral circuits, such as 10-bit A/D converter, timer, PWM, synchronous serial port, UART, I2C bus interface (master), Battery level detect circuit, LCD driver, are incorporated around 8-bit CPU nX-U8/100. The CPU nX-U8/100 is capable of efficient instruction execution in 1-instruction 1-clock mode by 3-stage pipe line architecture parallel procesing. The on-chip debug function that is installed enables program debugging and programming. FEATURES CPU 8-bit RISC CPU (CPU name: nX-U8/100) Instruction system:16-bit instructions Instruction set:Transfer, arithmetic operations, comparison, logic operations, multiplication/division, bit manipulations, bit logic operations, jump, conditional jump, call return stack manipulations, arithmetic shift, and so on On-Chip debug function Minimum instruction execution time Approx 30.5 s (at 32.768kHz system clock) = 2.2 to 5.5V Approx 0.122 s (at 8.192MHz system clock)V DD Internal memory Internal 128-Kbyte flash ROM(64K 16-bit) (including unusable 1KByte TEST area) Internal 2-Kbyte Data Flash (1-Kbyte 2) Internal 4-Kbyte RAM (4096 8 -bit) Interrupt controller 1 non-maskable interrupt sources (Internal source: 1, External source: 1) 26 maskable interrupt sources (Internal source: 22, External source: 4) Time base counter Low-speed time base counter 1 channel High-speed time base counter 1 channel Watchdog timer Generates a non-maskable interrupt upon the first overflow and a system reset occurs upon the second Free running Overflow period: 4 types selectable (125ms, 500ms, 2s, and 8s) Timers 8 bits 6ch (16-bit configuration available) 1/26