GS9090B GenLINX III 270Mb/s Deserializer for SDI
Key Features Description
SMPTE 259M-C compliant descrambling and NRZI to The GS9090B is a 270Mb/s reclocking deserializer with an
NRZ decoding (with bypass) internal FIFO. It provides a complete receive solution for
SD-SDI and DVB-ASI applications.
DVB-ASI 8b/10b decoding
Integrated line-based FIFO for data alignment/delay, In addition to reclocking and deserializing the input data
clock phase interchange, DVB-ASI data packet stream, the GS9090B performs NRZI-to-NRZ decoding, de-
extraction and clock rate interchange, and ancillary scrambling as per SMPTE 259M-C, and word alignment
data packet extraction when operating in SMPTE mode. When operating in
DVB-ASI mode, the device will word align the data to K28.5
Integrated VCO and reclocker
sync characters and 8b/10b decode the received stream.
User selectable additional processing features
including: The internal reclocker features a very wide input jitter tol-
erance, and is fully compatible with both SMPTE and
TRS, ANC data checksum, and EDH CRC error
DVB-ASI input streams.
detection and correction
programmable ANC data detection The GS9090B includes a range of data processing
functions such as EDH support (error detection and han-
illegal code remapping
dling), and automatic standards detection. The device can
Internal flywheel for noise immune H, V, F extraction
also detect and extract SMPTE 352M
Automatic standards detection and indication
payload identifier packets and independently identify the
Enhanced Gennum Serial Peripheral Interface (GSPI)
received video standard. This information is read from in-
ternal registers via the host interface port.
JTAG test interface
Polarity insensitive for DVB-ASI and SMPTE signals
The GS9090B also incorporates a video line-based FIFO.
This FIFO may be used in four user-selectable modes to car-
+1.8V core power supply with optional +1.8V or +3.3V
ry out tasks such as data alignment / delay, clock phase in-
I/O power supply
terchange, MPEG packet extraction and clock rate
Small footprint (8mm x 8mm)
interchange, and ancillary data packet extraction.
Low power operation (typically 145mW)
Parallel data outputs are provided in 10-bit multiplexed
Pb-free
format, with the associated parallel clock output signal op-
erating at 27MHz.
Applications
The device may also be used in a low-latency data pass
SMPTE 259M-C Serial Digital Interfaces
through mode where only descrambling and word align-
DVB-ASI Serial Digital Interfaces
ment will be performed in SMPTE mode.
GS9090B GenLINX III 270Mb/s Deserializer for SDI www.gennum.com 1 of 72
Data Sheet
40749 - 5 May 2010RD_RESET
RD_CLK
IOPROC_EN
STAT[3:0]
FW_EN
JTAG/HOST
CS_TMS
SCLK_TCK
SMPTE sync detect
SDIN_TDI
DVB_ASI
SDOUT_TDO
ASI sync detect
SMPTE_BYPASS
AUTO/MAN
LOCKED
RESET
PCLK
LF-
LF+
LB_CONT
Functional Block Diagram
carrier_detect
Programmable
I/O
LOCK detect
pll_lock
SMPTE De-
DOUT[9:0]
scramble, Word
Alignment and
Flywheel
TERM
TRS Correct
DATA_ERROR
TRS Check
CSUM Correct
DDI_1 CSUM Check
EDH Check &
FIFO
Reclocker ANC Data
S->P
DDI_1
Correct
Detection
DVB-ASI
Illegal Code Re-
Word Alignment
map
and
8b/10b Decode
HOST Interface
/ JTAG test
GS9090B Functional Block Diagram
Revision History
Version ECR PCN Date Changes and/or Modifications
5 154185 May 2010 Converted document back to Data Sheet.
4 152803 October 2009 Changed 6.1 Package Dimensions.
3 150198 50711 July 2008 DVB_ASI operation specification change in Master mode.
2 143668 January 2007 Added DVB-ASI payload data rate parameter to Table 2-3: AC Electrical
Characteristics.
1 143101 December 2006 Converting to data sheet. Removed Proprietary and Confidential footer.
Added section.
0 141913 September New Document.
2006
GS9090B GenLINX III 270Mb/s Deserializer for SDI 2 of 72
Data Sheet
40749 - 5 May 2010