SC2597SETRC Semtech

SC2597 Low Voltage DDR Termination Regulator POWER MANAGEMENT Features Description The SC2597 is designed to meet the latest JEDEC specifi - Input to linear regulator (VIN): 1.0V to 3.6V cation for low power DDR3 and DDR4, while also support- Output (VTT): 0.5V to 1.8V ing DDR and DDR2. The SC2597 regulates up to + 3A for Bias Voltage (VDD): 2.35V to 3.6V VTT and up to + 40mA for VREF. Up to 3A sink or source from VTT for DDR through DDR4 The SC2597 also provides an accuracy of +1% over tem- + 1% over temperature (with respect to VDDQ/2, in- perature (which takes into account the internal resistor cluding internal resistor divider variation) VREF and divider) for VREF and VTT for the memory controller and VTT DRAM. Logic-level enable input Built in soft-start SC2597 protection features include thermal shutdown Thermal shutdown with auto-restart with auto-restart for VTT and over-current limit for both Over current protection VTT and VREF. Minimal output capacitance Under-Voltage-Lock-Out circuits are included to ensure Package: SOIC8-EDP that the output is off when the bias voltage falls below its threshold, and that the part behaves elegantly in power- up or power-down. Applications The low external parts count combined with industry leading specifications make SC2597 an attractive solution DDR Memory Termination for DDR through DDR4 termination. Typical Application Circuit C IN C VDD 1F 2x10F VDDQ VDD VIN VDDQ VTT VTTS C VTT VREF 3x10F (1) C VREF EN GND 0.1F Note: (1) This component is optional. Rev. 2.9 2016 Semtech Corporation 11SC2597 Pin Configuration Ordering Information Device Package (1)(2) SC2597SETRC SOIC8-EDP Evaluation Board SC2597EVB Notes: (1) Available in tape and reel only. A reel contains 2500 devices. GND 1 8 VTT (2) Lead-free packaging only. Device is WEEE and RoHS compliant and halogen-free. EN 2 7 VIN GND PAD VTTS 3 6 VDD 4 5 VREF VDDQ Marking Information SC2597 yyww xxxxx yyww = Date Code xxxxx = Semtech Lot Number 22