TS13102-QFNR Semtech

LOAD VDD VGG WD SRC SUB Neo-Iso TS13102 Solid State Relay with Enhanced Diagnostics TRIUNE PRODUCTS Features Description Low Quiescent Operating Currents The TS13102 is a galvanically isolated 60V power 2A in OFF state switch device with bi-directional blocking. The 5A in ON state device includes a single integrated 290m high Supports scalable galvanically-isolated I/O voltage switch allowing high efficiency switching of power loads or other high current applications. The Addressable for minimum GPIO usage Supports eight physical address configurations single-pin CLK input pin controls the state of the switch through sequence options which control the Single control signal for on/off input (CLK) way the device switches, including immediate on/off, Microcontroller-compatible 1.7V to 5.5V input levels zero-volt switch-on, zero-current switch-off, dither Configurable switching options modes, as well as latching and non-latching Switch Characteristics: behavior. Bi-directional blocking in OFF state Single switch device 60V switch and 290m on-resistance The TS13102 includes several protection features. Up to 2.5A operating current Each switch has an integrated over-current shut- Package Options down to prevent device damage during short-circuit 16 lead QFN package 3x3mm, 1.0mm max height or other unusually high load conditions. If an over- current event is detected for a time, the switch is Operating Modes latched off until the CLK turn on sequence is given. Zero-cross ON / OFF Immediate ON / OFF Dithering Mode for system power sharing Applications Switch state polling Power load / rail switching Input supply multiplexing Summary Specification Isolated power supplies Junction operating temperature -40C to 125C Solid state relays Packaged in a 16 pin QFN (3x3) HVAC control Product is lead-free, Halogen Free, RoHS / WEEE Sprinkler control compliant Internet of Things (IoT) Typical Application Circuit C VGG C SYS SYSP DSW1 SW1 V AC AD0 TS13102 AD1 AD2 C ISO SW2 CLK D SW2 C DATA SYSM C DATA C VDD C SUB 1 of 16 TS13102 Final Datasheet Rev 2.3 Semtech Proprietary & Confidential 28 July 2016 C V C Pin Description Pin Symbol Pin Function Description SYSP 1 Positive System Voltage Connect C to SYSM SYS SYSM 2 Negative System Voltage SUB 3 IC Substrate Bias Connect C Capacitor to SYSM SUB SRC 4 Switch Driver Supply Return Local common supply return 5 Internal Switch Driver Supply Connect Bypass Capacitor C to SRC VGG VGG SW2 6 Switch Output Node 2 7 Switch Output Node 2 SW2 DATA 8 Data Output AC Coupled Data Output CLK 9 Clock Input AC Coupled Clock Input WD 10 Watch Dog Control input for latching vs non-latching Switch VDD 11 Internal Supply 1 Connect Bypass Capacitor C to SYSM VDD AD0 12 Address Select 0 For logic 0, must be tied to SYSM on PCB AD1 13 Address Select 1 For logic 1, must be tied to VDD on PCB AD2 14 Address Select 2 SW1 15 Switch Output Node 1 SW1 16 Switch Output Node 1 PAD PAD Power PAD Must be floating or connected to SUB Functional Block Diagram Figure 1: TS13102 Block Diagram TS13102 2 of 16 Final Datasheet Rev 2.3 Semtech Proprietary & Confidential 28 July 2016