SLG46120V-SKT Silego

SLG46120 GreenPAK Programmable Mixed Signal Array Features Pin Configuration Logic & Mixed Signal Circuits Highly Versatile Macrocells 1.8V (5%) to 5V (10%) Supply Operating Temperature Range: -40C to 85C RoHS Compliant / Halogen-Free 10 1 12 11 Pb-Free 12-pin STQFN: 1.6 x 1.6 x 0.55 mm, 0.4 mm pitch VDD GPIO 9 2 GPIO GPI Applications 8 3 GPIO GPIO 7 Personal Computers and Servers 4 5 6 GND GPIO PC Peripherals Consumer Electronics Data Communications Equipment Handheld and Portable Electronics STQFN-12 (Top View) Block Diagram Pin 12 Pin 11 GPIO GPIO Combination Function Macrocells Look Up Tables (LUTs) ACMP0 2-bit 2-bit 2-bit 2-bit LUT2 4 LUT2 0 LUT2 1 LUT2 2 or DFF0 or DFF1 or DFF2 Pin 1 Pin 10 3-bit 3-bit VDD GPIO LUT3 4 LUT3 5 3-bit 2bit 3-bit LUT3 1 LUT2 3 LUT3 0 or DFF5 3-bit 3-bit or DFF3 or DFF4 ACMP1 LUT2 6 LUT3 7 3-bit 3-bit 3-bit Pin 2 Pin 9 LUT3 8 or LUT3 2 LUT3 3 GPI GPIO Pipe Delay or DFF6 or DFF7 4bit 4-bit Additional Combination LUT4 0 LUT4 1 Functions or CNT2 or CNT3 Pin 3 Pin 8 GPIO GPIO FILTER 0/Prog. Delay Vref Counters/Delay Generators Pin 4 Pin 7 CNT0 CNT1 GPIO GND RC Oscillator Bandgap POR Pin 5 Pin 6 GPIO GPIO Silego Technology, Inc. Rev 1.08 000-0046120-108 Revised October 10, 2017 GPIO GPIO GPIO GPIOSLG46120 1.0 Overview The SLG46120 provides a small, low power component for commonly used mixed-signal functions. The user creates their circuit design by programming the one time Non-Volatile Memory (NVM) to configure the interconnect logic, the I/O Pins and the macrocells of the SLG46120. This highly versatile device allows a wide variety of mixed-signal functions to be designed within a very small, low power single integrated circuit. The macrocells in the device include the following: Two Analog Comparators (ACMP) Voltage References (Vref) Five Combinatorial Look Up Tables (LUTs) One 2-bit LUTs Four 3-bit LUTs Twelve Combination Function Macrocell Four Selectable DFF/Latch or 2-bit LUTs Four Selectable DFF/Latch or 3-bit LUTs One Selectable Pipe Delay or 3-bit LUT Pipe Delay 8 stage / 2 output, one 1 stage fixed output Two Selectable Counter/Delay or 4-bit LUT One Programmable Delay / Deglitch Filter Two Counter / Delay Generators (CNT/DLY) One 8-bit counter/delay One 14-bit counter/delay with external clock/reset Eight D Flip-Flop / Latches (DFF) (Part of Combination Function Macrocell) Pipe Delay 8 stage/2 output (Part of Combination Function Macrocell) One Bandgap RC Oscillator (RC OSC) Power On Reset (POR) 000-0046120-108 Page 1 of 91