Si595 REVISION D VOLTAGE-CONTROLLED CRYSTAL OSCILLATOR (VCXO) 10 TO 810 MHZ Features Available with any-rate output Available CMOS, LVPECL, Si5602 frequencies from 10 to 810 MHz LVDS, and CML outputs 3.3, 2.5, and 1.8 V supply options 3rd generation DSPLL with Industry standard 5x7 and superior jitter performance 3.2x5 mm packages Internal fixed fundamental mode Pb-free/RoHS-compliant crystal frequency ensures high 40 to +85 C operating range reliability and low aging Applications Ordering Information: SONET/SDH (OC-3/12/48) FTTx See page 9. Networking Clock recovery and jitter cleanup PLLs SD/HD SDI/3G SDI video FPGA/ASIC clock generation Pin Assignments: Description See page 8. The Si595 VCXO utilizes Silicon Laboratories advanced DSPLL circuitry to provide a low-jitter clock at high frequencies. The Si595 is available with (Top View) any-rate output frequency from 10 to 810 MHz. Unlike traditional VCXOs, where a different crystal is required for each output frequency, the Si595 V V C 1 6 DD uses one fixed crystal to provide a wide range of output frequencies. This IC- based approach allows the crystal resonator to provide exceptional OE 2 5 CLK frequency stability and reliability. In addition, DSPLL clock synthesis provides supply noise rejection, simplifying the task of generating low-jitter GND 3 4 CLK+ clocks in noisy environments. The Si595 IC-based VCXO is factory- configurable for a wide variety of user specifications including frequency, supply voltage, output format, tuning slope, and absolute pull range (APR). Specific configurations are factory programmed at time of shipment, thereby eliminating the long lead times associated with custom oscillators. Functional Block Diagram CLK CLK+ V DD Any-rate Fixed 10810 MHz Frequency DSPLL XO Clock Synthesis ADC Vc OE GND Rev. 1.4 6/18 Copyright 2018 by Silicon Laboratories Si595Si595 TABLE OF CONTENTS Section Page 1. Electrical Specifications .3 2. Pin Descriptions 8 3. Ordering Information 9 4. Package Outline Diagram: 5 x 7 mm, 6-pin .10 5. PCB Land Pattern: 5 x 7 mm, 6-pin 11 6. Package Outline Drawing: 3.2 x 5 mm, 6-pin 12 7. PCB Land Pattern: 3.2 x 5 mm, 6-pin 13 8. Si5xx Mark Specification: 5x7mm .14 9. Si5xx Mark Specification: 3.2 x 5 mm 15 Revision History .16 2 Preliminary Rev. 1.4