598ACA000568DGR Silicon Labs

Si598/Si599 2 10810 MHZ I C PROGRAMMABLE XO/VCXO Features 2 Programmable with 28 parts per I C programmable output trillion frequency resolution frequencies from 10 to 810 MHz Si5602 Integrated crystal provides stability 0.5 ps RMS phase jitter and low phase noise Superior power supply rejection: Frequency changes up to 0.30.4 ps additive jitter 3500 ppm are glitchless Available LVPECL, CMOS, LVDS, 40 to 85 C operation and CML outputs Industry-standard 5x7 mm package 1.8, 2.5, or 3.3 V supply Pin- and register-compatible with Si570/571 Applications Ordering Information: See page 21. SONET / SDH / xDSL Frequency margining Ethernet / Fibre Channel Digital PLLs 3G SDI / HD SDI CPU / FPGA FIFO control Pin Assignments: Multi-rate PLLs Adaptive synchronization Multi-rate reference clocks Agile RF local oscillators See page 20. Description (Top View) The Si598 XO/Si599 VCXO utilizes Silicon Laboratories' advanced DSPLL SDA circuitry to provide a low-jitter clock at any frequency. They are user- 7 programmable to any output frequency from 10 to 810 MHz with 28 parts per NC 1 6 V 2 DD trillion (PPT) resolution. The device is programmed via a 2-pin I C compatible serial interface. The wide frequency range and ultra-fine programming resolution make these devices ideal for applications that require in-circuit dynamic frequency OE 2 5 CLK adjustments or multi-rate operation with non-integer related rates. Using an integrated crystal, these devices provide stable low jitter frequency synthesis and GND 3 4 CLK+ replace multiple XOs, clock generators, and DAC controlled VCXOs. 8 Functional Block Diagram SCL Si598 V DD Power Supply Filtering OE SDA Fixed 7 Any Frequency CLK+ Frequency DSPLL V C 1 6 V DD 10 to 810 MHz Oscillator CLK Clock Synthesis OE 2 5 CLK Vc ADC I2C Interface (Si599) GND 3 4 CLK+ 8 SCL SDA SCL GND Si599 Rev. 1.1 6/18 Copyright 2018 by Silicon Laboratories Si598/Si599Si598/Si599 TABLE OF CONTENTS Section Page 1. Detailed Block Diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3 2. Electrical Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4 3. Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11 3.1. Programming a New Output Frequency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11 2 3.2. I C Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13 4. Serial Port Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .14 5. Si598 (XO) Pin Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .19 6. Si599 (VCXO) Pin Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .20 7. Ordering Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .21 8. Si59x Mark Specification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .23 9. Outline Diagram and Suggested Pad Layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .24 10. 8-Pin PCB Land Pattern . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .25 Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .26 Rev. 1.1 2