EFM8 Busy Bee Family EFM8BB2 Data Sheet The EFM8BB2, part of the Busy Bee family of MCUs, is a multi- KEY FEATURES purpose line of 8-bit microcontrollers with a comprehensive feature set in small packages. Pipelined 8-bit C8051 core with 50 MHz maximum operating frequency These devices offer high-value by integrating advanced analog and enhanced high- Up to 22 multifunction, 5 V tolerant I/O speed communication peripherals into small packages, making them ideal for space-con- pins strained applications. With an efficient 8051 core, enhanced pulse-width modulation, and One 12-bit Analog to Digital converter precision analog, the EFM8BB2 family is also optimal for embedded applications. (ADC) Two Low-current analog comparators with EFM8BB2 applications include the following: build-in DAC as reference input Medical equipment Motor control Integrated temperature sensor Lighting systems Consumer electronics 3-channel PWM / PCA with special hardware kill/safe state capability High-speed communication hub Sensor controllers Five 16-bit timers Two UARTs, SPI, SMBus/I2C master/ slave and I2C slave Priority crossbar for flexible pin mapping Core / Memory Clock Management Energy Management High Frequency CIP-51 8051 Core External CMOS Internal LDO 49 MHz RC Power-On Reset Oscillator Regulator (50 MHz) Oscillator Flash Program High Frequency RAM Memory Debug Interface Low Frequency Brown-Out 5 V-to 3.3 V LDO Memory 24.5 MHz RC (2304 bytes) with C2 RC Oscillator Detector Regulator (16 KB) Oscillator 8-bit SFR bus Serial Interfaces I/O Ports Timers and Triggers Analog Interfaces Security 16-bit CRC External Timer Comparator 0 2 x UART SPI Pin Reset PCA/PWM ADC Interrupts 0/1/2 Internal High-Speed General Watchdog 2 I C / SMBus Pin Wakeup Timer 3/4 Comparator 1 Voltage Purpose I/O I2C Slave Timer Reference Lowest power mode with peripheral operational: Normal Idle Suspend Snooze Shutdown silabs.com Building a more connected world. Rev. 1.4 EFM8BB2 Data Sheet Feature List 1. Feature List The EFM8BB2 highlighted features are listed below. Core: Timers/Counters and PWM: Pipelined CIP-51 Core 3-channel Programmable Counter Array (PCA) supporting Fully compatible with standard 8051 instruction set PWM, capture/compare, and frequency output modes 70% of instructions execute in 1-2 clock cycles 5 x 16-bit general-purpose timers 50 MHz maximum operating frequency Independent watchdog timer, clocked from the low frequen- cy oscillator Memory: Communications and Digital Peripherals: Up to 16 KB flash memory, in-system re-programmable from firmware, including 1 KB of 64-byte sectors and 15 2 x UART, up to 3 Mbaud KB of 512-byte sectors. SPI Master / Slave, up to 12 Mbps Up to 2304 bytes RAM (including 256 bytes standard 8051 SMBus/I2C Master / Slave, up to 400 kbps RAM and 2048 bytes on-chip XRAM) 2 I C High-Speed Slave, up to 3.4 Mbps Power: 16-bit CRC unit, supporting automatic CRC of flash at 256- 5 V-input LDO regulator byte boundaries Internal LDO regulator for CPU core voltage Analog: Power-on reset circuit and brownout detectors 12-Bit Analog-to-Digital Converter (ADC) I/O: Up to 22 total multifunction I/O pins: 2 x Low-current analog comparators with adjustable refer- All pins 5 V tolerant under bias ence Flexible peripheral crossbar for peripheral routing On-Chip, Non-Intrusive Debugging 5 mA source, 12.5 mA sink allows direct drive of LEDs Full memory and register inspection Clock Sources: Four hardware breakpoints, single-stepping Internal 49 MHz oscillator with accuracy of 1.5% Pre-loaded UART bootloader Internal 24.5 MHz oscillator with 2% accuracy Temperature range -40 to 85 C or -40 to 125 C Internal 80 kHz low-frequency oscillator Automotive grade available (requires PPAP) External CMOS clock option Single power supply of 2.2 to 3.6 V or 3.0 to 5.25 V QFN28, QSOP24, and QFN20 packages With on-chip power-on reset, voltage supply monitor, watchdog timer, and clock oscillator, the EFM8BB2 devices are truly standalone system-on-a-chip solutions. The flash memory is reprogrammable in-circuit, providing nonvolatile data storage and allowing field up- grades of the firmware. The on-chip debugging interface (C2) allows non-intrusive (uses no on-chip resources), full speed, in-circuit debugging using the production MCU installed in the final application. This debug logic supports inspection and modification of memory and registers, setting breakpoints, single stepping, and run and halt commands. All analog and digital peripherals are fully functional while debugging. Each device is specified for 2.2 to 3.6 V operation (or up to 5.25 V with the 5 V regulator option). Both the G-grade and I-grade devices are available in 28-pin QFN, 20-pin QFN, or 24-pin QSOP packages, and A-grade devices are available in 28-pin QFN or 20-pin QFN packages. All package options are lead-free and RoHS compliant. silabs.com Building a more connected world. Rev. 1.4 2