MGM210P Wireless Gecko Multi-Protocol Module Data Sheet The MGM210P is a module designed and built to meet the per- KEY FEATURES formance, security, and reliability requirements of line-powered IoT products for mesh networks. Zigbee, OpenThread, Bluetooth 5.1, and multi-protocol connectivity Based on the EFR32MG21 SoC, it enables Zigbee , OpenThread , Bluetooth and Built-in antenna and RF pin multi-protocol connectivity (Zigbee + Bluetooth) while delivering best-in-class RF range +10 and +20 dBm TX power variants and performance, future-proof capability for feature and OTA firmware updates, state-of- -103.9 dBm 802.15.4 RX sensitivity the-art security, low active current consumption, and a temperature rating suited for op- -97.0 dBm Bluetooth RX sensitivity at 1 eration in demanding environmental conditions. Mbps The MGM210P is a complete solution that comes with robust and fully-upgradeable soft- 32-bit ARM Cortex-M33 core at 38.4 MHz ware stacks, world-wide regulatory certifications, advanced development and debugging 1024/96 kB of Flash/RAM memory tools, and support that will simplify and minimize the development cycle and deployment Secure Element or Secure Vault of your end-product helping to accelerate its time-to-market. Optimal set of MCU peripherals The MGM210P is targeted for a broad range of applications, including: 20 GPIO pins -40 to +125 C Smart home 12.9 mm x 15.0 mm x 2.2 mm Connected lighting Building automation and security Core / Memory Crystal Clock Management Energy Security Management Crypto Acceleration Secure Boot 38.4 HF Crystal HF Fast Startup TM Oscillator RC Oscillator RC Oscillator Voltage with RTSL MHz ARM Cortex M33 processor Flash Program TRNG Regulator with DSP extensions, Memory FPU and TrustZone EM2 HF RC Extended DPA Countermeasures Brown-Out Unique Identifier Oscillator Detector Secure Debug Authentication LF Crystal Ultra LF RC LF LDMA Power-On ETM Secure Debug RAM Memory Controller Oscillator Oscillator RC Oscillator Reset Anti-Tamper 32-bit bus Peripheral Reflex System Antenna Radio Transceiver Serial I/O Ports Timers and Triggers Analog I/F Interfaces External DEMOD RF Frontend USART Timer/Counter Protocol Timer ADC Interrupts Chip I LNA Antenna Q General Low Energy Watchdog Analog PGA IFADC 2 I C Purpose I/O Timer Timer Comparator Matching PA Real Time AGC Pin Reset Capture Counter Frequency PA RF Pin Synth MOD Back-Up Real Pin Wakeup Time Counter Lowest power mode with peripheral operational: EM0Active EM1Sleep EM2Deep Sleep EM3Stop EM4Shutoff silabs.com Building a more connected world. Copyright 2021 by Silicon Laboratories Rev. 1.2 CRC FRC RAC BUFCMGM210P Wireless Gecko Multi-Protocol Module Data Sheet Features 1. Features Supported Protocols Operating Range Zigbee 1.71 to 3.8 V OpenThread -40 to +125C Bluetooth 5.1 Dimensions Bluetooth Mesh 12.9 mm x 15.0 mm x 2.2 mm 2 Multi-protocol (Zigbee + Bluetooth 5.1) Security Wireless System-on-Chip 1 Secure Boot with Root of Trust and Secure Loader (RTSL) 2.4 GHz radio Hardware Cryptographic Acceleration for AES128/192/256, TX power up to +20 dBm ChaCha20-Poly1305, SHA-1, SHA-2/256/384/512, ECDSA +ECDH (P-192, P-256, P-384, P-521), Ed25519 and 32-bit ARM Cortex -M33 with DSP instruction and floating- Curve25519, J-PAKE, PBKDF2 point unit for efficient signal processing True Random Number Generator (TRNG) compliant with 1024 kB flash program memory NIST SP800-90 and AIS-31 96 kB RAM data memory ARM TrustZone Embedded Trace Macrocell (ETM) for advanced debugging Secure Debug Interface lock/unlock Receiver Performance 1 DPA Countermeasures -103.9 dBm sensitivity (1% PER) at 250 kbps O-QPSK Secure Key Management with PUF DSSS Anti-Tamper -104.5 dBm sensitivity (0.1% BER) at 125 kbps GFSK Secure Attestation -100.1 dBm sensitivity (0.1% BER) at 500 kbps GFSK MCU Peripherals -97.0 dBm sensitivity (0.1% BER) at 1 Mbps GFSK 12-bit 1 Msps SAR Analog to Digital Converter (ADC) -94.1 dBm sensitivity (0.1% BER) at 2 Mbps GFSK 2 Analog Comparator (ACMP) Current Consumption 20 General Purpose I/O pins with output state retention and 9.4 mA RX current at 250 kbps O-QPSK DSSS asynchronous interrupts 9.3 mA RX current at 1 Mbps GFSK 8 Channel DMA Controller 16.1 mA TX current at 0 dBm (MGM210Px22) 12 Channel Peripheral Reflex System (PRS) 34.1 mA TX current at 10 dBm (MGM210Px22) 3 16-bit Timer/Counter 181.3 mA TX current at 20 dBm (MGM210Px32) (3 Compare/Capture/PWM channels) 50.9 A/MHz in Active Mode (EM0) 1 32-bit Timer/Counter 5.1 A EM2 DeepSleep current (RTCC running from LFXO, (3 Compare/Capture/PWM channels) Bluetooth Stack not running) 32-bit Real Time Counter 8.5 A EM2 DeepSleep current (RTCC running from LFXO, 24-bit Low Energy Timer for waveform generation Bluetooth Stack running) 2 Watchdog Timer Regulatory Certifications 3 Universal Synchronous/Asynchronous Receiver/Trans- CE and UKCA - EU and UK 2 mitter (UART/SPI/SmartCard (ISO 7816)/IrDA/I S) FCC - USA 2 2 I C interface with SMBus support ISED - Canada MIC - Japan KC - South Korea 1. With Secure Element (SE) firmware v1.1.2 or newer 2. See Table 3.2 Security Features and Levels on page 7 for details on security level differences between MGM210PB and MGM210PA part numbers. silabs.com Building a more connected world. Rev. 1.2 2