Si2166-D60 DVB-S/S2/S2X Digital TV Demodulator Description Features The Si2166D integrates digital demodulators for first and second - Pin-to-pin compatible with all Si216x/8x single demods family generation satellite DVB standards (DVB-S/S2 and S2X) in a - API compatible with all single and dual demods families single advanced CMOS die. Leveraging Silicon Labs proven - DVB-S2 (ETSI EN 302 307-1 V1.4.1) digital demodulation architecture, the Si2166D achieves excellent - QPSK/8PSK demodulator satellite reception performance while significantly minimizing - DVB-S2X (ETSI EN302 307-2 V1.1.1) front-end design complexity, cost, and power dissipation. - Support the normative broadcast services Connecting the Si2166D to a satellite silicon tuner results in a - QPSK/8PSK, 8/16/32APSKdemodulator high-performance and cost optimized TV or STB front-end - Roll-off factors from 0.05 to 0.35 solution. - VCM supported The satellite reception allows demodulating widespread DVB-S, - ISSY and NPD supported DIRECTV (DSS), DVB-S2, DIRECTV (AMC) legacy - MIS supported standards, and new Part II of DVB-S2 (S2X) satellite broadcast - Output modes: TS, GPCS, and GSE-HEM supported standard. A zero-IF interface (differential) allows for a seamless connection to market proven satellite silicon tuners. Si2166D - DVB-S and DSS supported TM embeds DiSEqC 2.0 LNB interface for satellite dish control and - QPSK demodulator and enhanced FEC decoder an equalizer to compensate for echoes in long cable feeds from - 1 to 45 MSymbol/s for all satellite standards (<40 MSps in the antenna to the satellite tuner input. 32APSK) - LDPC and BCH FEC decoding for DVB-S2/S2X standards The Si2166D offers an on-chip blind scan algorithm for DVB-S/S2/ 2 S2X standards, as well as a blind lock function. The Si2166D - I C serial bus interfaces (master and host) programmable transport stream output interface provides a flexible - Firmware control (embedded ROM/NVM) range of output modes and is fully compatible with all MPEG 2 - Upgradeable with patch download via I C or fast SPI decoders or conditional access modules to support any customer - Flexible TS output interface (serial, parallel, and slave) application. TM TM - DiSEqC 2.0 interface and Unicable support - Fast lock times - Low power consumption - Two power supplies: 1.2 and 3.3 V - 7x7 mm, QFN-48 pin package, Pb-free/RoHS compliant Applications - Full-NIM - iDTV (integrated Digital TV) - Digital satellite STB - PC-TV accessories - PVR, DVD, and Blue Ray disc recorders 1.2, 3.3V RESETB TM DiSEqC DSP & CTRL GPIO 2.0 SYNCHRO TS ERR/ S ADC IP GPIO 1 QPSK/8PSK/xAPSK S ADC IN ADC (I) VITERBI RS TS SYNC Satellite S ADC QP TS VAL ADC (Q) S ADC QN x(A)PSK EQUAL- ZIF Tuner FRONT TS CLK DEMOD IZER END TS DATA MP x AGCs LDPC BCH 8 DVB-S/S2/S2X FEC MODULE Ext. Clk or Xtal OSC Si2166D & PLL CLK IN OUT HOST SDA TUN SDA 2 2 I C I C TUN SCL HOST SCL SWITCH I/F Digital Demodulator Copyright 2015 by Silicon Laboratories 10.14.15 DISEQC IN DISEQC OUT MPEG TS GPIO 0 INTERFACE HDTV MPEG S.o.C.Si2166-D60 DVB-S/S2/S2X Digital TV Demodulator Selected Electrical Specifications (T = 10 to 75 C) A Parameter Test Condition Min Typ Max Unit General Input clock reference 4 30 MHz Supported XTAL frequency 16 30 MHz 1 Total power consumption DVB-S2 421 mW 2 DVB-S 230 mW 2 layer PCB 35 C/W Thermal resistance 4 layer PCB 23 C/W Power Supplies V 1.14 1.20 1.30 V DD VCORE V 3.00 3.30 3.60 V DD VANA V 3.00 3.30 3.60 V DD VIO Notes: 1. Test conditions: 32 Mbaud, CR = 3/5, 8PSK, pilots On, parallel TS, C/N at picture failure. 4 2. Test conditions: 30 Mbaud, CR = 7/8, parallel TS, at QEF: BER = 2 x 10 . Pin Assignments 36 35 34 33 32 31 30 29 28 27 26 25 S ADC IP 37 24 TS DATA 6 S ADC IN 38 23 TS DATA 5 S ADC QP 39 22 VDD VIO S ADC QN 40 21 GND/JTAG TDI Si2166D NC 41 20 VDD VCORE NC 42 (GND PAD) 19 TS DATA 4 NC 43 18 TS DATA 3 QFN-48 CLK IN OUT 44 17 TS DATA 2 7x7mm SDA MAST 45 16 TS DATA 1 SCL MAST 46 15 TS DATA 0 /TS SER GND/JTAG TRSTB 47 14 TS CLK VDD VCORE 48 13 TS SYNC 1 2 3 4 5 6 7 8 9 10 11 12 Selection Guide Part Number Description Si2166-D60-GM DVB-S/S2/S2X Digital TV Demodulator, 7x7 mm QFN-48 Digital Demodulator Copyright 2015 by Silicon Laboratories 10.14.15 Silicon Laboratories and Silicon Labs are trademarks of Silicon Laboratories Inc. Other products or brandnames mentioned herein are trademarks or registered trademarks of their respective holders MP A VDD VANA MP B GND GPIO 0/JTAG TMS ADDR DISEQC CMD XTAL I/CLK IN DISEQC IN XTAL O DISEQC OUT RESETB VDD VCORE MP D GND/JTAG TCLK MP C VDD VIO VDD VCORE SCL HOST GND/JTAG TDO SDA HOST TS ERR/GPIO 1 TS VAL TS DATA 7