Si3402BISO-EVB ISOLATED EVALUATION BOARD FOR THE Si3402B 1. Description The Si3402B isolated evaluation board (Si3402BISO-EVB Rev 2) is a reference design for power supplies in Power over Ethernet (PoE) Powered Device (PD) applications. The Si3402B is described more completely in the data sheet and application notes. This document describes only the Si3402BISO-EVB evaluation board. An evaluation board demonstrating the non-isolated application is described in the Si3402B-EVB Users Guide. 2. Planning for Successful Designs Skyworks Solutions strongly recommends the use of the schematic and layout databases provided with the evaluation boards as the starting point for your design. Use of external components other than those described and recommended in this document is generally discouraged. Refer to Table 2 on page 9 for more information on critical component specifications. Careful attention to the recommended layout guidelines is required to enable robust designs and full specification compliance. To help ensure design success, please submit your schematic and layout databases to the Power group for review and feedback. 3. Si3402B Board Interface Ethernet data and power are applied to the board through the RJ-45 connector (J1). The board itself has no Ethernet data transmission functionality, but, as a convenience, the Ethernet transformer secondary is brought out to the test points. Power may be applied in the following ways: Connecting a dc source to Pins 1, 2 and 3, 6 of the Ethernet cable (either polarity). Connecting a dc source to Pins 4, 5 and 7, 8 of the Ethernet cable (either polarity). Using an IEEE 802.3-2015-compliant, PoE-capable PSE, such as Trendnet TPE-1020WS. The Si3402BISO-EVB board schematics and layout are shown in Figures 1 through 6. The dc output is at connectors J11(+) and J12(). Boards are generally shipped configured to produce +5 V output voltage but can be configured for +3.3V or other output voltages as shown in Table2 on page9. The preconfigured Class 3 signature also can be modified according to Table 3 on page 10. The D8D15 Schottky-type diode bridge bypass is recommended only for higher power levels (Class 3 operation). For lower power levels, such as Class 1 and Class 2, the diodes can be removed. When the Si3402B is used in external diode bridge configuration, it requires at least one pair of the CTx and SPx pins to be connected to the PoE voltage input terminals (to the input of the external bridge). The feedback loop compensation has been optimized for 3.3, 5, 9, and 12 V output as well as with standard and low ESR capacitors in the output filter section (Table 2 on page 9). The use of low ESR capacitors is recommended for lower output ripple, improved load transient response and low temperature (below 0 C) operation. Skyworks Solutions, Inc. Phone 781 376-3000 Fax 781 376-3100 sales skyworksinc.com www.skyworksinc.com Rev. 1.3 Skyworks Proprietary Information Products and Product Information are Subject to Change Without Notice September 26, 2021Si3402BISO-EVB 2 Skyworks Solutions, Inc. Phone 781 376-3000 Fax 781 376-3100 sales skyworksinc.com www.skyworksinc.com Rev. 1.3 Skyworks Proprietary Information Products and Product Information are Subject to Change Without Notice September 26, 2021 Vpos is an EMI and ESD plane. Use top layer. Vout pos plane for EMI C19 1nF R1 330 Connect transformer and input TP1 J11 filter caps together minimizing area of return loop and then connect J1:A1, K1 must be isolated from A2,K2 Vposs to Vpos plane. 10:3 secondary NI cathode D3 L1 BND POST anode 5V 1uH R2 T1 7 PDS1040 49.9K 1 8 C1 C3 C4 + C2 C7 R10 + GNDI 1uF 1uF C5 J1 1uF 12uF 470pF 10 1000uF 2 10 RJ-45 Vss 9 C6 FA2924 100uF J12 1 RDP TP3 NI TP2 MX0+ CT 2 TP4 NI swo CT 3 RDN TP5 NI MX0- NI BND POST 4 TDP MX1+ TP6 NI U1 GNDI 5 TDN TP7 NI CT/MX1- 6 MX1- At least one pair of CT1/CT2 or SP1/SP2 7 should be connected. 1 PWR1 EROUT 14 CT1 2 NC 13 CT2 Si3402B 3 Vdd 12 Vpos 4 R11 R7 R5 NC 11 4.99K 2.05K 36.5K SP1 L5 330 Ohm L4 330 Ohm U2 VO618A-3X017T L3 330 Ohm L2 330 Ohm C9 R8 0 3.3nF Vss C18 0.1uF U3 TLV431 R6 12.1K C20 1nF Capacitors C10-C17 are for ESD immunity.. GNDI 0 Place optional bypass diodes for high power applications (>7W) in parallel. 400 W Cesar Chavez St, Austin, TX 78701, United States Vneg is a thermal plane as well as ESD and EMI. Use thermal vias to at least 1 inch square plane on backside 1 to 1.2mm pitch 0.3 to 0.33mm diameter. Figure 1. Si3402B Schematic5 V, Class 3 PD 11 K2 PWR5 LED K2 10 A2 PWR4 LED A2 9 K1 PWR3 LED K1 8 A1 PWR2 LED A1 SS2150 D11 SS2150 D15 C14 1nF C10 1nF SS2150 D10 SS2150 D14 C15 1nF C11 1nF SS2150 D9 SS2150 D13 C16 1nF C12 1nF SS2150 D8 SS2150 D12 C17 1nF C13 1nF 10 15 SP2 Vssa 9 16 Vneg NC R3 8 17 RCL NC 48.7 7 18 HSO SWO R4 6 19 RDET VSS2 24.3k 5 20 nploss FB D1 D2 DFLT30A-7 1N4148W C22 0.1uF R12 0 C21 15nF