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SI4021-A1-FT Silicon Labs

SI4021-A1-FT electronic component of Silicon Labs
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Part No.SI4021-A1-FT
Manufacturer: Silicon Labs
Category: RF Transmitter
Description: RF Transmitter FSK, OOK 433MHz, 868MHz, 915MHz 8dBm 512kbps PCB, Surface Mount Antenna 16-TSSOP (0.173", 4.40mm Width)
Datasheet: SI4021-A1-FT Datasheet (PDF)
This product is classified as Large/Heavy, additional shipping charges may apply. A customer service representative may contact you after ordering to confirm exact shipping charges



Price (USD)
2016: USD 3.3842 ea
Line Total: USD 6822.55 
Availability - 0
MOQ: 2016  Multiples: 2016
Pack Size: 2016
Availability Price Quantity
0
Ship by Tue. 10 Dec to Mon. 16 Dec
MOQ : 1
Multiples : 1
1 : USD 8.3324
10 : USD 7.1442
25 : USD 6.4295
100 : USD 5.8582
250 : USD 5.2866
500 : USD 4.7438
1000 : USD 4.2865

0
Ship by Fri. 06 Dec to Tue. 10 Dec
MOQ : 2016
Multiples : 2016
2016 : USD 3.3842
4032 : USD 3.3842
10080 : USD 3.3842

0
Ship by Tue. 10 Dec to Mon. 16 Dec
MOQ : 4
Multiples : 1
4 : USD 4.9258
25 : USD 4.0202

   
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Si4021 Universal ISM Si4021 Band FSK Transmitter PIN ASSIGNMENT DESCRIPTION FSK 1 16 SDI 1 16 SDI FSK Silicon Labs Si4021 is a single chip, low power, multi-channel FSK 2 15 2 15 VDD SCK VDD SCK 3 14 nIRQ nSEL 3 14 nLBD transmitter designed for use in applications requiring FCC or ETSI nSEL 4 13 4 13 RFP PB1 RFP PB1 conformance for unlicensed use in the 433, 868, and 915 MHz bands. 5 12 5 12 RFN PB2 RFN PB2 Used in conjunction with Si4020, Silicon Labs FSK receiver, the Si4021 6 11 MOD PB3 6 11 MOD PB3 TM transmitter features EZRadio technology, which produces a flexible, low 7 10 7 10 VSS PB4 VSS PB4 cost, and highly integrated solution that does not require production 8 9 8 9 XTL SDO XTL CLK alignments. All required RF functions are integrated. Only an external crystal and bypass filtering are needed for operation. The Si4021 builds on Microcontroller Mode EEPROM Mode the features presented by the Si4020 by offering a higher output power and an improved phase noise characteristic. The Si4021 shares the same pinout and control command set as the Si4020. The Si4021 offers all of This document refers to Si4021-IC Rev A1. the frequencies as the Si4020, with the exception of the 315 MHz band. See www.silabs.com/integration for any applicable errata. See back page for ordering information. The Si4021 features a completely integrated PLL for easy RF design, and its rapid settling time allows for fast frequency hopping, bypassing multipath fading and interference to achieve robust wireless links. In FEATURES addition, highly stable and accurate FSK modulation is accomplished by direct closed-loop modulation with bit rates up to 115.2 kbps. The PLLs Fully integrated (low BOM, easy design-in) high resolution allows the use of multiple channels in any of the bands. No alignment required in production Fast settling, programmable, high-resolution PLL The integrated power amplifier of the transmitter has an open-collector Fast frequency hopping capability differential output that directly drive a loop antenna with programmable Stable and accurate FSK modulation with programmable output level. No additional matching network is required. An automatic deviation antenna tuning circuit is built in to avoid costly trimming procedures and Programmable PLL loop bandwidth de-tuning due to the hand effect. Direct loop antenna drive For low-power applications, the device supports automatic activation from Automatic antenna tuning circuit sleep mode. Active mode can be initiated by several wake-up events (on- Programmable output power level chip timer timeout, low supply voltage detection, or activation of any of the Alternative OOK support four push-button inputs). EEPROM mode supported The Si4021s on-chip digital interface supports both a microcontroller SPI bus for applications with microcontroller mode and an EEPROM mode. The latter allows complete data transmitter Clock output for microcontroller operation without a microcontroller (both control commands and data are Integrated programmable crystal load capacitor read from the EEPROM). Any wake-up event can start a transmission of the Multiple event handling options for wake-up activation corresponding data stored in the EEPROM. Push-button event handling with switch de-bounce Wake-up timer FUNCTIONAL BLOCK DIAGRAM Low battery detection 2.2 to 5.4 V supply voltage Low power consumption RFP CRYSTAL REFERENCE Low standby current (0.3 A) XTL SYNTHESIZER OSCILLATOR RFN Compact 16-pin TSSOP package Transmit bit synchronization CLOCK FREQUENCY TYPICAL APPLICATIONS LOAD CAP LEVEL OOK MOD Remote control nIRQ/nLBD LOW BAT LOW Home security and alarm CLK/SDO BATTERY TRESHOLD DETECT Wireless keyboard/mouse and other PC peripherals CONTROLLER SDI Toy control SCK TIMEOUT nSEL Remote keyless entry VDD WAKE-UP PERIOD TIMER VSS FSK Tire pressure monitoring Telemetry Personal/patient data logging Remote automatic meter reading PB1 PB2 PB3 PB4 1 Si4021-DS Rev 2.3r 0408 www.silabs.com/integration Si4021 Wake-Up Timer DETAILED DESCRIPTION The wake-up timer has very low current consumption (1.5 A typical) and can be programmed from 1 ms to several days with The Si4021 FSK transmitter is designed to cover the unlicensed an accuracy of 5%. frequency bands at 433, 868, and 915 MHz. The device facilitates compliance with FCC and ETSI requirements. It calibrates itself to the crystal oscillator at every startup, and then every 30 seconds. When the oscillator is switched off, the PLL calibration circuit switches on the crystal oscillator only long The programmable PLL synthesizer determines the operating enough for a quick calibration (a few milliseconds) to facilitate frequency, while preserving accuracy based on the on-chip accurate wake-up timing. The auto calibration feature can be crystal-controlled reference oscillator. The PLLs high resolution disabled by setting the a bit in the Low Battery Detector allows the usage of multiple channels in any of the bands. The Command. FSK deviation is selectable (from 30 to 210 kHz with 30 kHz Event Handling increments) to accommodate various bandwidth, data rate and crystal tolerance requirements, and it is also highly accurate due In order to minimize current consumption, the device supports to the direct closed-loop modulation of the PLL. The transmitted sleep mode. Active mode can be initiated by several wake-up digital data can be sent asynchronously through the FSK pin or events: timeout of wake-up timer, detection of low supply over the control interface using the appropriate command. voltage, pressing any of the four push-button inputs, or through the serial interface. The push-button inputs can be driven by a The RF VCO in the PLL performs automatic calibration, which logic signal from a microcontroller or controlled directly by requires only a few microseconds. To ensure proper operation in normally open switches. Pull-up resistors are integrated. the programmed frequency band, the RF VCO is automatically calibrated upon activation of the synthesizer. If temperature or If any wake-up event occurs, the wake-up logic generates an supply voltage change significantly or operational band has interrupt, which can be used to wake up the microcontroller, changed, VCO recalibration is recommended.. Recalibration can effectively reducing the period the microcontroller has to be be initiated at any time by switching the synthesizer off and back active. The cause of the interrupt can be read out from the on again. transmitters by the microcontroller through the nIRQ pin. RF Power Amplifier (PA) Interface The power amplifier has an open-collector differential output and An SPI compatible serial interface lets the user select the can directly drive a loop antenna with a programmable output operating frequency band and center frequency of the power level. An automatic antenna tuning circuit is built in to synthesizer, polarity and deviation of FSK modulation, and output avoid costly trimming procedures and the so-called hand effect. power level. Division ratio for the microcontroller clock, wake-up timer period, and low battery detector threshold are also The transmitters can operate in On-Off Keying (OOK) mode by programmable. Any of these auxiliary functions can be disabled switching the power amplifier on and off. When the appropriate when not needed. All parameters are set to default after power- control bit is set using the Power Setting Command, the FSK pin on the programmed values are retained during sleep mode. becomes an enable input (active high) for the power amplifier. EEPROM Mode Crystal Oscillator In simple applications, the on-chip digital controller provides the The chip has a single-pin crystal oscillator circuit, which provides transmitters with direct interface to a serial (SPI) EEPROM. In this a 10 MHz reference signal for the PLL. To reduce external parts case, no external microcontroller is necessary. Wake-up events and simplify design, the crystal load capacitor is internal and initiate automatic readout of the assigned command sequence programmable. Guidelines for selecting the appropriate crystal from EEPROM memory. For every event, there is a dedicated can be found later in this datasheet. starting address available in the EEPROM. The transmitters can supply the clock signal for the Programming the EEPROM is very simple. Any control command microcontroller, so accurate timing is possible without the need can be programmed in the EEPROM sequentially (same as in for a second crystal. When the chip receives a Sleep Command microcontroller mode). from the microcontroller and turns itself off, it provides several further clock pulses (clock tail) for the microcontroller to be The internal power-on reset (POR) is a dedicated event, which able to go to idle or sleep mode. The length of the clock tail is can be used to program the basic settings of the transmitters. In programmable. this case the chip starts to read out the preprogrammed data from the 00h address in EEPROM. Data can be transmitted with Low Battery Voltage Detector the help of the Data Transmit Command, which tells the The low battery voltage detector circuit monitors the supply transmitters how many bytes must be transmitted. The whole voltage and generates an interrupt if it falls below a process finishes with a Sleep Command. programmable threshold level. The detector circuit has 50 mV hysteresis. 2

Tariff Desc

8542.31.00 51 No ..Application Specific (Digital) Integrated Circuits (ASIC)

Electronic integrated circuits: Processors and controllers, whether or not combined with memories, converters, logic circuits, amplifiers, clock and timing circuits, or other circuits
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