Si4706-C31 HIGH-PERFORMANCE FM RDS/RBDS RECEIVER Features Worldwide FM band support FM Hi-cut control (76108 MHz) Advanced FM stereo-mono blend Advanced patented RDS/RBDS Automatic gain control (AGC) decoding engine Integrated FM LNA Outstanding RDS sensitivity Image-rejection mixer Leading RDS synchronization Frequency synthesizer with metrics integrated VCO Highly reliable RDS decoder Low-IF direct conversion with no Ordering Information: RDS reception with FM mono external ceramic filters See page 29. broadcast 2.7 to 5.5 V supply voltage Received signal quality indicators Programmable reference clock On-chip tuned resonance for Stereo audio out Pin Assignments embedded antenna support 2 I S Digital audio out FM multi-path detection and 20-pin 3 x 3 mm QFN package Si4706-GM mitigation Pb-free/RoHS compliant (Top View) Applications Cellular handsets Dedicated data receiver 20 19 18 17 NC 1 16 Portable media devices Personal navigation devices (PND) FMI 2 15 DOUT In-car navigation systems GPS-enabled handsets and portable RFGND 3 14 LOUT GND devices PAD LPI 4 13 ROUT RST 5 12 GND Description 6 11 VDD 7 8 9 10 The high-performance Si4706-C31 FM RDS receiver provides the most advanced and flexible audio and RDS data processing available for portable devices today. The 100% CMOS IC integrates the complete FM and data receiver function from antenna to analog or digital audio and data out in a single 3 x 3 mm 20-pin QFN. This product, its features, and/or its architecture is covered by one or Functional Block Diagram more of the following patents, as well as other patents, pending and Half-wavelength Si4706 antenna issued, both foreign and domestic: FMI ADC DAC 7,127,217 7,272,373 7,272,375 LOUT Embedded 7,321,324 7,355,476 7,426,376 antenna LNA PGA DSP LPI 7,471,940 7,339,503 7,339,504. ADC DAC ROUT RFGND AGC GPO 0/90 DCLK 32.768 kHz (TYP) RSSI RDS RCLK DOUT AFC CONTROL DFS 2.75.5 V VDD INTERFACE XTAL REG OSC Rev. 1.0 12/09 Copyright 2009 by Silicon Laboratories Si4706-C31 Silicon Laboratories Confidential. Information contained herein is covered under non-disclosure agreement (NDA). SEN SCLK SDIO RST VIO DIGITAL INTERFACE SEN NC SCLK SDIO GPO1 RCLK GPO2/INT VIO GPO3/DCLK DFSSi4706-C31 2 Rev. 1.0