S34ML01G3 S34ML02G3 1Gb, 2Gb, 3 V, x8 I/O, SLC NAND Flash Memory for Embedded Distinctive Characteristics Density NAND Flash Interface Open NAND Flash Interface (ONFI) 1.0 compliant 1 Gb/ 2 Gb Address, Data, and Commands multiplexed Architecture Input / Output Bus Width: 8 bits Supply voltage Page Size 3.3-V device: V = 2.7 V ~ 3.6 V CC 1 Gb: (2048 + 64) bytes 64-byte spare area Security 1 Gb: (2048 + 128) bytes 128-byte spare area 2 Gb: (2048 + 128) bytes 128-byte spare area One Time Programmable (OTP) area Serial number (unique ID) Block Size: 64 Pages Hardware program/erase disabled during power transition 1 Gb: 128 KB + 4 KB Volatile and Permanent Block Protection 1 Gb: 128 KB + 8 KB 2 Gb: 128 KB + 8 KB Electronic Signature Manufacturer ID: 01h Plane Size Device ID: follow industry standard for single and stacked die 1 Gb: 1024 blocks per plane or (128 MB + 4 MB) implementation 2 Gb: 1024 blocks per plane or (128 MB + 8 MB) Operating Temperature Device Size Industrial: 40C to 85C 1 Gb: 1 plane per device or 128 Mbyte Industrial Plus: 40C to 105C 2 Gb: 2 plane per device or 256 Mbyte Additional Features NAND Flash Interface Copy Back Program (S34ML02G3) Reset (FFh) command is required after power-on as a first Open NAND Flash Interface (ONFI) 1.0 compliant command Address, Data, and Commands multiplexed Performance Page Read / Program Reliability Read Page Time (t ): R 80,000 Program/Erase cycles (Typ) 45 s (Typ) / Single Plane 10 Year Data retention (Typ) 55 s (Typ) / Multi Plane Blocks 0-7 are good at the time of shipment Program time / Multiplane Program time: 350 s (Typ) Package Options Block Erase / Multiplane Erase Pb-free and low halogen Block Erase time: 4 ms (Typ) 48-Pin TSOP 12 20 1.2 mm 63-Ball BGA 9 11 1 mm SkyHigh Memory Limited SSuiuitte e 44440011-02,-02, 4444//FF OOne ne IIslslaanndd EEaastst,, www.skyhighmemory.com Document Number: 002-19206 Rev. C 18 Westlands Road Hong Kong Revised Nov. 23, 2021S34ML01G3 S34ML02G3 Contents 1. General Description..................................................... 3 7. Timing Diagrams......................................................... 40 1.1 Logic Diagram ....................................................... 4 7.1 Command Latch Cycle......................................... 40 1.2 Connection Diagram.............................................. 5 7.2 Address Latch Cycle ............................................ 40 1.3 Pin Description ...................................................... 6 7.3 Data Input Cycle Timing....................................... 41 1.4 Block Diagram ....................................................... 7 7.4 Data Output Cycle Timing 1.5 Array Organization ..................................................8 (CLE=L, WE =H, ALE=L, WP =H)...................... 41 1.6 Addressing ..............................................................9 7.5 Data Output Cycle Timing 1.7 Mode Selection.................................................... 10 (EDO Type, CLE=L, WE =H, ALE=L).................. 42 7.6 Page Read Operation........................................... 42 2. Bus Operation ............................................................ 11 7.7 Page Read Operation (Interrupted by CE )......... 43 2.1 Command Input................................................... 11 7.8 Page Read Operation Timing with CE Dont Care 2.2 Address Input ...................................................... 11 ............................................................................. 43 2.3 Data Input............................................................ 11 7.9 Page Program Operation ..................................... 44 2.4 Data Output......................................................... 11 7.10 User Spare Program ............................................ 45 2.5 Write Protect........................................................ 11 7.11 Small Data Input Guidelines................................. 45 2.6 Standby ............................................................... 11 7.12 Page Program Operation Timing with CE 3. Command Set............................................................. 12 Dont Care............................................................ 46 3.1 Page Read .......................................................... 13 7.13 Page Program Operation with Random 3.3 Page Program ..................................................... 14 Data Input............................................................. 46 3.5 Page Reprogram................................................. 15 7.14 Random Data Output In a Page........................... 47 3.6 Block Erase ......................................................... 16 3.8 Copy Back Program ............................................ 17 7.16 Block Erase Operation ......................................... 48 3.9 Read Status Register .......................................... 17 3.10 Read Status Enhanced ....................................... 18 7.18 Copy Back Read With Optional Data Readout..... 50 3.11 Read Status Register Field Definition ...................18 7.19 Copy Back Program Operation With Random 3.12 Reset.....................................................................19 Data Input............................................................. 50 3.13 Read ID .................................................................19 7.21 Read Status Register Timing ............................... 52 3.14 Read ONFI Signature.......................................... 20 7.22 Read Status Enhanced Timing.............................53 3.15 Read Parameter Page......................................... 20 7.23 Reset Operation Timing ....................................... 53 3.16 Read Unique ID................................................... 21 7.24 Read ID Operation Timing.................................... 53 3.17 One-Time Programmable (OTP) ......................... 22 3.18 Feature Operations ...............................................24 7.26 Read ONFI Signature Timing............................... 54 7.27 Read Parameter Page Timing.............................. 55 4. Security Features.........................................................27 7.28 Read Unique ID Timing........................................ 55 4.1 Volatile Block Protection (VBP) Overview .............27 7.29 OTP Entry Timing................................................. 56 4.2 Permanent Block Protection (PBP) Overview .......28 7.30 Legacy OTP Protection Timing ..........................56 7.31 PowerO n andD ataP rotectionT iming.....................56 5. Signal Descriptions ................................................... 34 7.32 WP Handling ...................................................... 58 5.1 Data Protection and Power On / Off Sequence... 34 5.2 Ready/Busy......................................................... 34 8. Physical Interface ....................................................... 59 5.3 Write Protect Operation.........................................35 8.1 Physical Diagram ................................................. 59 6. Electrical Characteristics............................................36 9. System Interface ......................................................... 61 6.1 Valid Blocks...........................................................36 10. Error Management ...................................................... 62 6.2 Absolute Maximum Ratings..................................36 10.1 System Bad Block Replacement...........................62 6.3 Recommended Operating Conditions ...................36 10.2 Bad Block Management ....................................... 63 6.4 AC Test Conditions ...............................................36 11. Ordering Information.................................................. 64 6.5 AC Characteristics.................................................38 12. Document History Page ............................................. 65 6.6 DC Characteristics ............................................... 38 6.7 Pin Capacitance ....................................................38 6.8 Thermal Resistance ..............................................39 6.9 Program / Erase Characteristics ..........................40 Document Number: 002-19206 Rev. C Page 2 of 65