S34ML04G300TFA103 SkyHigh Memory

S34ML04G3 4 Gb, 3 V, 4K Page Size, x8 I/O, SLC NAND Flash Memory for Embedded Distinctive Characteristics Density Security 4 Gb One Time Programmable (OTP) area Serial Number (unique ID) Architecture Hardware program/erase disabled during power transition Input / Output Bus Width: 8 bits Volatile and Permanent Block Protection Page Size: Electronic Signature (4096 + 256) bytes 256-byte spare area Manufacturer ID: 01h Block size: 64 Pages Device ID: Follow industry standard for single and stacked 256 KB + 16 KB die implementation Plane Size 2048 blocks (512 MB + 32 MB) Operating Temperature Device Size Industrial: 40C to 85C 1 plane per device or 512 Mbyte Industrial Plus: 40C to 105C Additional Features NAND Flash Interface Copy Back Program Open NAND Flash Interface (ONFI) 1.0 compliant Reset (FFh) command is required after power-on as a first Address, Data, and Commands multiplexed command Supply Voltage 3.3-V Device: V = 2.7 V ~ 3.6 V CC Performance Reliability Page Read / Program Read Page Time (t ): R 80,000 Program / Erase cycles (Typ) 55 s (Typ) / Single Plane 10 Year Data retention (Typ) Program Time: 350 s (Typ) Blocks 0-7 are good at the time of shipment Block Erase Package Options Block Erase Time: 4 ms (Typ) Pb-free and low halogen 48-Pin TSOP 12 20 1.2 mm 63-Ball BGA 9 11 1 mm SkyHigh Memory Limited Suite 4401-02, 44/F One Island East, www.skyhighmemory.com Document Number: 002-19822 Rev. *M 18 Westlands Road Hong Kong Revised Nov. 13, 2019S34ML04G3 Contents 1. General Description..................................................... 3 7.1 Command Latch Cycle.................................................. 37 7.2 Address Latch Cycle..................................................... 37 1.1 Logic Diagram................................................................ 4 7.3 Data Input Cycle Timing................................................ 38 1.2 Connection Diagram ...................................................... 5 7.4 Data Output Cycle Timing (CLE=L, 1.3 Pin Description............................................................... 6 WE =H, ALE=L, WP =H)............................................. 38 1.4 Block Diagram................................................................ 7 7.5 Data Output Cycle Timing (EDO Type, 1.5 Array Organization......................................................... 7 CLE=L, WE =H, ALE=L) .............................................. 39 1.6 Addressing..................................................................... 8 7.6 Page Read Operation ................................................... 39 1.7 Mode Selection .............................................................. 9 7.7 Page Read Operation (Interrupted by CE ).................. 40 2. Bus Operation ............................................................ 10 7.8 Page Read Operation Timing with CE 2.1 Command Input ........................................................... 10 Dont Care..................................................................... 40 2.2 Address Input............................................................... 10 7.9 Page Program Operation.............................................. 41 2.3 Data Input .................................................................... 10 7.10 User Spare Program..................................................... 41 2.4 Data Output.................................................................. 10 7.11 Small Data Input Guidelines ......................................... 42 2.5 Write Protect ................................................................ 10 7.12 Page Program Operation Timing with CE 2.6 Standby........................................................................ 10 Dont Care..................................................................... 42 7.13 Page Program Operation with Random 3. Command Set............................................................. 11 Data Input ..................................................................... 42 3.1 Page Read................................................................... 12 7.14 Random Data Output In a Page ................................... 43 3.2 Page Program.............................................................. 12 7.15 Block Erase Operation.................................................. 43 3.3 Page Reprogram.......................................................... 12 7.16 Copy Back Read with Optional Data 3.4 Block Erase.................................................................. 14 Readout ........................................................................ 43 3.5 Copy Back Program..................................................... 14 7.17 Copy Back Program Operation With 3.6 Read Status Register................................................... 14 Random Data Input....................................................... 44 3.7 Read Status Enhanced................................................ 15 7.18 Read Status Register Timing........................................ 44 3.8 Read Status Register Field Definition.......................... 15 7.19 Read Status Enhanced Timing ..................................... 44 3.9 Reset............................................................................ 16 7.20 Reset Operation Timing................................................ 45 3.10 Read ID........................................................................ 16 7.21 Read ID Operation Timing ............................................ 45 3.11 Read ID2...................................................................... 17 7.22 Read ID2 Operation Timing .......................................... 45 3.12 Read ONFI Signature .................................................. 17 7.23 Read ONFI Signature Timing........................................ 46 3.13 Read Parameter Page ................................................. 17 7.24 Read Parameter Page Timing ...................................... 46 3.14 Read Unique ID ........................................................... 20 7.25 Read Unique ID Timing................................................. 46 3.15 One-Time Programmable (OTP).................................. 21 7.26 OTP Entry Timing ......................................................... 47 3.16 Feature Operations...................................................... 22 7.27 Legacy OTP Protection Timing..................................... 47 4. Security Features....................................................... 24 7.28 Power On and Data Protection Timing ......................... 47 4.1 Volatile Block Protection (VBP) Overview.................... 24 7.29 WP Handling............................................................... 49 4.2 Permanent Block Protection (PBP) Overview.............. 27 8. Physical Interface ....................................................... 50 5. Signal Descriptions ................................................... 30 8.1 Physical Diagram.......................................................... 50 5.1 Data Protection and Power On / Off Sequence ........... 30 9. System Interface ......................................................... 52 5.2 Ready/Busy.................................................................. 30 5.3 Write Protect Operation ............................................... 32 10. Error Management ...................................................... 53 10.1 System Bad Block Replacement................................... 53 6. Electrical Characteristics.......................................... 33 10.2 Bad Block Management................................................ 54 6.1 Valid Blocks ................................................................. 33 6.2 Absolute Maximum Ratings ......................................... 33 11. Ordering Information.................................................. 55 6.3 Recommended Operating Conditions.......................... 33 12. Document History....................................................... 57 6.4 AC Test Conditions...................................................... 33 6.5 AC Characteristics ....................................................... 34 6.6 DC Characteristics....................................................... 35 6.7 Pin Capacitance........................................................... 35 6.8 Thermal Resistance..................................................... 35 6.9 Program / Erase Characteristics.................................. 36 7. Timing Diagrams........................................................ 37 Document Number: 002-19822 Rev. *M Page 2 of 57