WRL-13990 SparkFun

nRF52832 - Product Specification v1.0 All rights reserved. Reproduction in whole or in part is prohibited without the prior written permission of the copyright holder. 2016-02-17Contents Contents 1 Revision history................................................................................... 9 2 About this document............................................................................................ 10 2.1 Peripheral naming and abbreviations................................................................................... 10 2.2 Register tables...................................................................................................................... 10 2.3 Registers ............................................................................................................................... 11 3 Block diagram.................................................................................... 12 4 Pin assignments.................................................................................................... 13 4.1 QFN48 pin assignments....................................................................................................... 13 5 Absolute maximum ratings.................................................................................. 16 6 Recommended operating conditions.................................................................. 17 7 CPU......................................................................................................................... 18 7.1 Floating point interrupt.......................................................................................................... 18 7.2 Electrical Specification.......................................................................................................... 18 7.3 CPU and support module configuration................................................................................19 8 Memory................................................................................................................... 20 8.1 RAM - Random access memory...........................................................................................20 8.2 Flash - Non-volatile memory.................................................................................................20 8.3 Memory map......................................................................................................................... 21 8.4 Instantiation........................................................................................................................... 21 9 AHB multilayer.......................................................................................................23 9.1 AHB multilayer priorities........................................................................................................23 10 EasyDMA.............................................................................................................. 24 10.1 EasyDMA array list............................................................................................................. 25 11 NVMC Non-volatile memory controller......................................................... 26 11.1 Writing to Flash...................................................................................................................26 11.2 Erasing a page in Flash..................................................................................................... 26 11.3 Writing to user information configuration registers (UICR)................................................. 26 11.4 Erasing user information configuration registers (UICR).................................................... 26 11.5 Erase all.............................................................................................................................. 27 11.6 Cache.................................................................................................................................. 27 11.7 Registers............................................................................................................................. 27 11.8 Electrical Specification........................................................................................................ 30 12 BPROT Block protection................................................................................31 12.1 Registers............................................................................................................................. 31 13 FICR Factory information configuration registers.......................................41 13.1 Registers ............................................................................................................................. 41 14 UICR User information configuration registers........................................... 52 14.1 Registers............................................................................................................................. 52 15 Peripheral interface............................................................................................. 66 15.1 Peripheral ID....................................................................................................................... 66 15.2 Peripherals with shared ID..................................................................................................66 15.3 Peripheral registers............................................................................................................. 67 15.4 Bit set and clear..................................................................................................................67 15.5 Tasks...................................................................................................................................67 15.6 Events..................................................................................................................................68 15.7 Shortcuts............................................................................................................................. 68 15.8 Interrupts............................................................................................................................. 68 Page 2