DEMOTS4956J STMicroelectronics

TS4956 2 Stereo audio amplifier system with I C bus interface Features TS4956 - flip-chip 18 Operating from V = 2.7 V to 5.5 V CC 2 I C bus control interface 38 mW output power at V =3.3 V, CC THD = 1%, F = 1 kHz, with 16 load Ultra low consumption in standby mode: 0.5 A Digital volume control range from +12 dB to -34 dB 32-step digital volume control 2 Stereo loudspeaker option by I C Pin connections (top view) 8 different output mode selections Pop and click reduction circuitry PGPGHH MLOMLO GNDGND Flip-chip package, 18 bumps with 300 m diameter LHP-LHP- RHPRHP++ Lead-free flip chip package RIRINN VCCVCC SDSDAA Output power limitation on headphone for BYPABYPASSSS LILINN eardrum damage consideration VCCVCC I2I2CCVVCCCC MINMIN SRSRPP++ SRN-SRN- Applications MIPMIP GNDGND SCSCLL Mobile phones (cellular/cordless) PDAs Laptop / notebook computers Portable audio devices The overall gain and the different output modes of the TS4956 are controlled digitally by the control registers which are programmed via the IC Description interface. It has also an internal thermal shutdown The TS4956 is a complete audio system device protection mechanism. with three dedicated outputs, one stereo headphone, one loudspeaker drive and one mono line for a hands-free set. The stereo headphone is capable of delivering more than 25 mW per channel of continuous average power into 16 single-ended loads with 0.3% THD+N from a 5 V power supply. The device functions are controlled 2 via an I C bus, which minimizes the number of external components needed. March 2009 Rev 4 1/55 www.st.com 55 Obsolete Product(s) - Obsolete Product(s)Contents TS4956 Contents 1 Absolute maximum ratings and operating conditions . 4 2 Typical application schematic . 5 2 2.1 I C interface 7 2.1.1 IC operation description . 7 2.1.2 Gain and mode setting operations 9 2.1.3 Acknowledge bit . 10 3 Electrical characteristics 11 4 Application information . 38 4.1 Output configurations 38 4.1.1 Shutdown 38 4.1.2 Single-ended output configuration (modes 5 and 6) . 38 4.1.3 Phantom ground output configuration (modes 3 and 4) . 38 4.1.4 BTL output configuration (modes 1, 2, 7) . 39 4.2 Power limitation in the phantom ground configuration . 39 4.3 Power dissipation and efficiency . 40 4.3.1 Single-ended output configuration (modes 5 and 6) . 40 4.3.2 Phantom ground output configuration (modes 3, 4): . 41 4.3.3 BTL output configuration (modes 1, 2, 7) . 42 4.4 Low frequency response . 44 4.4.1 Input capacitor C in 44 4.4.2 Output capacitor C out . 44 4.5 Single-ended input configuration in modes 1, 3 and 5 . 45 4.6 Decoupling of the circuit 46 4.7 Power-on reset . 46 4.8 PSRR measurements 47 4.8.1 What is PSRR . 47 4.8.2 How is PSRR measured . 47 4.9 Pop and click performance 48 4.10 Thermal shutdown 48 4.11 Demonstration board 49 2/55 Obsolete Product(s) - Obsolete Product(s)