H3LIS100DLTR STMicroelectronics

H3LIS100DL MEMS motion sensor: low-power high-g 3-axis digital accelerometer Datasheet - production data Description The H3LIS100DL is a low-power high- performance 3-axis linear accelerometer 2 belonging to the nano family, with digital I C/SPI serial interface standard output. 3 The device features ultra-low-power operational TFLGA 3x3x1.0 mm 16L modes that allow advanced power saving and smart sleep-to-wakeup functions. Features The H3LIS100DL has a full scale of 100 g and is capable of measuring accelerations with output Wide supply voltage, 2.16 V to 3.6 V data rates from 0.5 Hz to 400 Hz. Low-voltage compatible IOs, 1.8 V The H3LIS100DL is available in a small thin Ultra-low power consumption down to 10 A in plastic land grid array package (LGA) and is low-power mode guaranteed to operate over an extended temperature range from -40 C to +85 C. 100 g full scale 2 I C/SPI digital output interface 8-bit data output Sleep-to-wakeup function 10000 g high shock survivability ECOPACK , RoHS and Green compliant Applications Shock detection Impact recognition and logging Table 1. Device summary Order codes Temperature range C Package Packaging 3 H3LIS100DLTR -40 to +85 Tape and reel TFLGA 3x3x1.0 mm 16L April 2015 DocID027504 Rev 2 1/38 This is information on a product in full production. www.st.comContents H3LIS100DL Contents 1 Block diagram and pin description . 7 1.1 Block diagram . 7 1.2 Pin description 7 2 Mechanical and electrical specifications 9 2.1 Mechanical characteristics . 9 2.2 Electrical characteristics 10 2.3 Communication interface characteristics . 11 2.3.1 SPI - serial peripheral interface . 11 2 2.3.2 I C - inter-IC control interface 12 2.4 Absolute maximum ratings 13 2.5 Terminology . 14 2.5.1 Sensitivity 14 2.5.2 Zero-g level 14 2.5.3 Sleep-to-wakeup 14 3 Functionality 15 3.1 Sensing element 15 3.2 IC interface 15 3.3 Factory calibration 15 4 Application hints . 16 4.1 Soldering information 16 5 Digital interfaces . 17 2 5.1 I C serial interface 17 2 5.1.1 I C operation . 18 5.2 SPI bus interface . 20 5.2.1 SPI read . 21 5.2.2 SPI write 22 5.2.3 SPI read in 3-wire mode 23 6 Register mapping 24 2/38 DocID027504 Rev 2